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comparison gsm-fw/bsp/inth.h @ 143:afceeeb2cba1

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Our nuc-fw is destined to become gsm-fw, so I went ahead and did the big hg mv
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Tue, 12 Nov 2013 05:35:48 +0000
parents nuc-fw/bsp/inth.h@91460c8957f0
children
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142:15d5977390c2 143:afceeeb2cba1
1 /*******************************************************************************
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
3
4 Property of Texas Instruments -- For Unrestricted Internal Use Only
5 Unauthorized reproduction and/or distribution is strictly prohibited. This
6 product is protected under copyright law and trade secret law as an
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
8 rights reserved.
9
10
11 Filename : inth.h
12
13 Description : Header file for the INTH module
14
15 Project : drivers
16
17 Author : pmonteil@tif.ti.com Patrice Monteil.
18
19 Version number : 1.17
20
21 Date : 09/02/03
22
23 Previous delta : 01/22/01 10:32:33
24
25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/RELEASE_GPRS/drivers1/common/SCCS/s.inth.h
26
27 Sccs Id (SID) : '@(#) inth.h 1.10 01/30/01 10:22:23 '
28
29
30 *****************************************************************************/
31
32 #include "../include/config.h"
33 #include "../include/sys_types.h"
34
35 #if (CHIPSET != 12)
36
37 /* Adress of the registers */
38
39 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9)|| (CHIPSET == 10) || (CHIPSET == 11))
40 #define INTH_IT_REG1 MEM_INTH_ADDR /* INTH IT register 1 */
41 #define INTH_IT_REG2 (MEM_INTH_ADDR + 0x02) /* INTH IT register 2 */
42 #define INTH_MASK_REG1 (MEM_INTH_ADDR + 0x08) /* INTH mask register 1 */
43 #define INTH_MASK_REG2 (MEM_INTH_ADDR + 0x0a) /* INTH mask register 2 */
44 #define INTH_B_IRQ_REG (MEM_INTH_ADDR + 0x10) /* INTH source binary IRQ reg. */
45 #define INTH_B_FIQ_REG (MEM_INTH_ADDR + 0x12) /* INTH source binary FIQ reg. */
46 #define INTH_CTRL_REG (MEM_INTH_ADDR + 0x14) /* INTH control register */
47 #define INTH_EXT_REG (MEM_INTH_ADDR + 0x20) /* INTH 1st external int. reg. */
48 #else
49 #define INTH_IT_REG MEM_INTH_ADDR /* INTH IT register */
50 #define INTH_MASK_REG (MEM_INTH_ADDR + 0x02) /* INTH mask register */
51 #define INTH_S_IRQ_REG (MEM_INTH_ADDR + 0x04) /* INTH source IRQ register */
52 #define INTH_S_FIQ_REG (MEM_INTH_ADDR + 0x06) /* INTH source FIQ register */
53 #define INTH_B_IRQ_REG (MEM_INTH_ADDR + 0x08) /* INTH source binary IRQ reg. */
54 #define INTH_B_FIQ_REG (MEM_INTH_ADDR + 0x0a) /* INTH source binary FIQ reg. */
55 #define INTH_CTRL_REG (MEM_INTH_ADDR + 0x0c) /* INTH control register */
56 #define INTH_EXT_REG (MEM_INTH_ADDR + 0x0e) /* INTH 1st external int. reg. */
57 #endif
58
59 /* Interrupts number */
60
61 #define INTH_TIMER 0 /* number of the TIMER int. */
62 #define INTH_AIRQ_FIRST 1 /* first external int. number */
63 #define INTH_AIRQ_LAST 13 /* last external int. number */
64 #define INTH_DMA 14 /* number of the DMA int. */
65 #define INTH_LEAD 15 /* number of the LEAD int. */
66
67 /* Bit definition of INTH interrupt level registers */
68
69 #define INTH_FIQ_NIRQ 0x0001
70 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
71 #define INTH_PRIORITY 0x007c
72 #define INTH_EDGE_NLVL 0x0002
73 #else
74 #define INTH_PRIORITY 0x001e
75 #define INTH_EDGE_NLVL 0x0020
76 #endif
77
78
79 /* Bit definition of INTH source binary registers */
80
81 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
82 #define INTH_SRC_NUM 0x001f
83 #else
84 #define INTH_SRC_NUM 0x000f
85 #endif
86
87
88 /* Bit definition of INTH Control Register */
89
90 #define INTH_NEW_IRQ_AGR 0x0001
91 #define INTH_NEW_FIQ_AGR 0x0002
92
93 /* Other useful constants */
94
95 #define INTH_IRQ 0
96 #define INTH_FIQ 1
97 #define INTH_LEVEL 0
98 #define INTH_EDGE 1
99
100 /*
101 * Macros
102 */
103
104 #define INT_MASK(interrupt) (1 << (interrupt - 1))
105 #define PENDING_INT(pendingITs, interrupt) (pendingITs & INT_MASK(interrupt))
106
107 /*--------------------------------------------------------------*/
108 /* INTH_ENABLEONEIT() */
109 /*--------------------------------------------------------------*/
110 /* Parameters : num of the IT to enable */
111 /* Return : none */
112 /* Functionality : Unmask one it */
113 /*--------------------------------------------------------------*/
114 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
115 #define INTH_ENABLEONEIT(it)( \
116 (it < 16) ? (* (volatile unsigned short *) INTH_MASK_REG1 &= ~(1 << it)) : \
117 (* (volatile unsigned short *) INTH_MASK_REG2 &= ~(1 << (it-16))) \
118 )
119 #else
120 #define INTH_ENABLEONEIT(it)(* (volatile unsigned short *) INTH_MASK_REG &= ~(1 << it))
121 #endif
122
123 /*--------------------------------------------------------------*/
124 /* INTH_DISABLEONEIT() */
125 /*--------------------------------------------------------------*/
126 /* Parameters : num of the IT to disable */
127 /* Return : none */
128 /* Functionality : mask one it */
129 /*--------------------------------------------------------------*/
130 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
131 #define INTH_DISABLEONEIT(it)( \
132 (it < 16) ? (* (volatile unsigned short *) INTH_MASK_REG1 |= (1 << it)) : \
133 (* (volatile unsigned short *) INTH_MASK_REG2 |= (1 << (it-16))) \
134 )
135 #else
136 #define INTH_DISABLEONEIT(it)(* (volatile unsigned short *) INTH_MASK_REG |= (1 << it))
137 #endif
138
139 /*--------------------------------------------------------------*/
140 /* INTH_ENABLEALLIT() */
141 /*--------------------------------------------------------------*/
142 /* Parameters : none */
143 /* Return : none */
144 /* Functionality : Enable all it */
145 /*--------------------------------------------------------------*/
146
147 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
148 #define INTH_ENABLEALLIT { \
149 * (volatile unsigned short *) INTH_MASK_REG1 = 0x0000; \
150 * (volatile unsigned short *) INTH_MASK_REG2 = 0x0000; \
151 }
152 #else
153 #define INTH_ENABLEALLIT ( * (volatile unsigned short *) INTH_MASK_REG = 0x0000)
154 #endif
155
156 /*--------------------------------------------------------------*/
157 /* INTH_DISABLEALLIT() */
158 /*--------------------------------------------------------------*/
159 /* Parameters : none */
160 /* Return : none */
161 /* Functionality :mask all it */
162 /*--------------------------------------------------------------*/
163
164 #if (CHIPSET == 4)
165 #define INTH_DISABLEALLIT { \
166 * (volatile unsigned short *) INTH_MASK_REG1 = 0xffff; \
167 * (volatile unsigned short *) INTH_MASK_REG2 = 0x000f; \
168 }
169 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 9))
170 #define INTH_DISABLEALLIT { \
171 * (volatile unsigned short *) INTH_MASK_REG1 = 0xffff; \
172 * (volatile unsigned short *) INTH_MASK_REG2 = 0x01ff; \
173 }
174 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)
175 #define INTH_DISABLEALLIT { \
176 * (volatile unsigned short *) INTH_MASK_REG1 = 0xffff; \
177 * (volatile unsigned short *) INTH_MASK_REG2 = 0xffff; \
178 }
179 #else
180 #define INTH_DISABLEALLIT (* (volatile unsigned short *) INTH_MASK_REG = 0xffff)
181 #endif
182
183
184 /*--------------------------------------------------------------*/
185 /* INTH_CLEAR() */
186 /*--------------------------------------------------------------*/
187 /* Parameters : value to write */
188 /* Return : none */
189 /* Functionality :valid next it */
190 /*--------------------------------------------------------------*/
191
192
193 #define INTH_CLEAR (* (volatile SYS_UWORD16 *) INTH_CTRL_REG = 0x0003)
194
195
196 /*--------------------------------------------------------------*/
197 /* INTH_VALIDNEXT() */
198 /*--------------------------------------------------------------*/
199 /* Parameters : num of the processed it */
200 /* Return : none */
201 /* Functionality :valid next it */
202 /*--------------------------------------------------------------*/
203
204 #define INTH_VALIDNEXT (intARM)( * (volatile SYS_UWORD16 *) INTH_CTRL_REG |= (1 << intARM))
205
206 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
207 /*--------------------------------------------------------------*/
208 /* INTH_RESETALLIT() */
209 /*--------------------------------------------------------------*/
210 /* Parameters : None */
211 /* Return : None */
212 /* Functionality :Reset the inth it register */
213 /*--------------------------------------------------------------*/
214
215 #define INTH_RESETALLIT { \
216 * (volatile unsigned short *) INTH_IT_REG1 &= 0x0000; \
217 * (volatile unsigned short *) INTH_IT_REG2 &= 0x0000; \
218 }
219 #endif
220
221
222 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
223 /*-------------------------------------------------------------*/
224 /* INTH_RESETONEIT() */
225 /*-------------------------------------------------------------*/
226 /* Parameters : Num of the IT to reset */
227 /* Return : None */
228 /* Functionality : Reset one IT of the inth IT register */
229 /*-------------------------------------------------------------*/
230 #define INTH_RESETONEIT(it) ( \
231 (it<16) ? (* (volatile unsigned short *) INTH_IT_REG1 &= ~(1 << it)) : \
232 (* (volatile unsigned short *) INTH_IT_REG2 &= ~(1 << (it-16))) \
233 )
234 #else // CHIPSET == 2,3
235 #define INTH_RESETONEIT(it) (* (volatile unsigned short *) INTH_IT_REG &= ~(1 << it))
236 #endif // CHIPSET
237
238 /* Prototypes */
239
240 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
241 unsigned long INTH_GetPending (void);
242 unsigned long INTH_ResetIT (void);
243 #else
244 unsigned short INTH_GetPending (void);
245 unsigned short INTH_ResetIT (void);
246 #endif
247
248 unsigned short INTH_Ack (int);
249 void INTH_InitLevel (int, int, int, int);
250
251
252 #endif /* endif chipset != 12 */
253