FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/bsp/niq.c @ 143:afceeeb2cba1
Our nuc-fw is destined to become gsm-fw, so I went ahead and did the big hg mv
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Tue, 12 Nov 2013 05:35:48 +0000 |
parents | nuc-fw/bsp/niq.c@45911ad957fd |
children |
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142:15d5977390c2 | 143:afceeeb2cba1 |
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1 /****************************************************************************** | |
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION | |
3 | |
4 Property of Texas Instruments -- For Unrestricted Internal Use Only | |
5 Unauthorized reproduction and/or distribution is strictly prohibited. This | |
6 product is protected under copyright law and trade secret law as an | |
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All | |
8 rights reserved. | |
9 | |
10 | |
11 Filename : niq.c | |
12 | |
13 Description : Nucleus IQ initializations | |
14 | |
15 Project : Drivers | |
16 | |
17 Author : proussel@ti.com Patrick Roussel. | |
18 | |
19 Version number : 1.8 | |
20 | |
21 Date and time : 01/30/01 10:22:21 | |
22 | |
23 Previous delta : 12/19/00 14:22:24 | |
24 | |
25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/RELEASE_GPRS/drivers1/common/SCCS/s.niq.c | |
26 | |
27 Sccs Id (SID) : '@(#) niq.c 1.8 01/30/01 10:22:21 ' | |
28 *******************************************************************************/ | |
29 | |
30 | |
31 #include "../include/config.h" | |
32 #include "../include/sys_types.h" | |
33 | |
34 #include "mem.h" | |
35 #include "rhea_arm.h" | |
36 #include "inth.h" | |
37 #include "iq.h" | |
38 | |
39 extern SYS_FUNC irqHandlers[IQ_NUM_INT]; | |
40 | |
41 /*--------------------------------------------------------------*/ | |
42 /* IQ_Prty[IQ_NUM_INT] */ | |
43 /*--------------------------------------------------------------*/ | |
44 /* Parameters : none */ | |
45 /* Return : none */ | |
46 /* Functionality : IRQ priorities 0xFF means interrupt is masked*/ | |
47 /*--------------------------------------------------------------*/ | |
48 | |
49 #if (CHIPSET == 4) | |
50 unsigned char IQ_Prty[IQ_NUM_INT] = | |
51 { | |
52 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
53 0x01, 0x02, 0x02, 0xFF, 0x00, 0x04, 0x07, 0x02, | |
54 | |
55 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
56 0x01, 0x03, 0x03, 0x00, 0x08, 0x05, 0x06, 0x03, | |
57 | |
58 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 | |
59 0x07, 0xFF, 0x02, 0x03 | |
60 | |
61 }; | |
62 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 9)) | |
63 unsigned char IQ_Prty[IQ_NUM_INT] = | |
64 { | |
65 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
66 0x01, 0x02, 0x02, 0xFF, 0x00, 0x04, 0x07, 0x02, | |
67 | |
68 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
69 0x01, 0x03, 0x03, 0x00, 0x08, 0x05, 0x06, 0x03, | |
70 | |
71 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 AIRQ21 AIRQ22 AIRQ23 | |
72 0x07, 0xFF, 0x02, 0x03, 0x0F, 0xFF, 0xFF, 0xFF, | |
73 | |
74 // AIRQ24 | |
75 0xFF | |
76 | |
77 }; | |
78 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) | |
79 unsigned char IQ_Prty[IQ_NUM_INT] = | |
80 { | |
81 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
82 0x01, 0x02, 0x02, 0xFF, 0x00, 0x04, 0x07, 0x02, | |
83 | |
84 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
85 0x01, 0x03, 0x03, 0x00, 0x08, 0x05, 0x06, 0x03, | |
86 | |
87 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 | |
88 0x07, 0xFF, 0x02, 0x03, 0xFF | |
89 | |
90 }; | |
91 #elif (CHIPSET == 12) | |
92 unsigned char IQ_Prty[IQ_NUM_INT] = | |
93 { | |
94 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
95 0x01, 0x02, 0x02, 0xFF, 0x00, 0x04, 0x07, 0x02, | |
96 | |
97 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
98 0x01, 0x03, 0x03, 0x00, 0x08, 0x05, 0x06, 0x03, | |
99 | |
100 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 AIRQ21 AIRQ22 AIRQ23 | |
101 0x07, 0xFF, 0x02, 0x03, 0xFF, 0xFF, 0xFF, 0xFF, | |
102 | |
103 // AIRQ24 AIRQ25 AIRQ26 AIRQ27 AIRQ28 AIRQ29 AIRQ30 AIRQ31 | |
104 0xFF, 0xFF, 0xFF, 0xFF, 0x02, 0xFF, 0xFF, 0xFF | |
105 | |
106 }; | |
107 #else | |
108 unsigned char IQ_Prty[IQ_NUM_INT] = | |
109 { | |
110 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
111 0x01, 0x02, 0x02, 0xFF, 0x00, 0x04, 0x07, 0x02, | |
112 | |
113 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
114 0x01, 0x03, 0x03, 0x00, 0x08, 0x05, 0x06, 0x03 | |
115 | |
116 }; | |
117 #endif | |
118 | |
119 /*--------------------------------------------------------------*/ | |
120 /* IQ_LEVEL[IQ_NUM_INT] */ | |
121 /*--------------------------------------------------------------*/ | |
122 /* Parameters : none */ | |
123 /* Return : none */ | |
124 /* Functionality : IRQ sensitivity */ | |
125 /* 0: falling edge 1: low level (default) */ | |
126 /*--------------------------------------------------------------*/ | |
127 | |
128 #if (CHIPSET == 4) | |
129 unsigned char IQ_LEVEL[IQ_NUM_INT] = | |
130 { | |
131 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
132 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, | |
133 | |
134 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
135 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01, | |
136 | |
137 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 | |
138 0x01, 0x01, 0x00, 0x00 | |
139 | |
140 }; | |
141 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 9)) | |
142 unsigned char IQ_LEVEL[IQ_NUM_INT] = | |
143 { | |
144 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
145 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, | |
146 | |
147 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
148 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01, | |
149 | |
150 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 AIRQ21 AIRQ22 AIRQ23 | |
151 0x01, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
152 | |
153 // AIRQ24 | |
154 0x00 | |
155 | |
156 }; | |
157 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) | |
158 unsigned char IQ_LEVEL[IQ_NUM_INT] = | |
159 { | |
160 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
161 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, | |
162 | |
163 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
164 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01, | |
165 | |
166 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 | |
167 0x01, 0x01, 0x00, 0x00, 0x00 | |
168 | |
169 }; | |
170 #elif (CHIPSET == 12) | |
171 unsigned char IQ_LEVEL[IQ_NUM_INT] = | |
172 { | |
173 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
174 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, | |
175 | |
176 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
177 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01, | |
178 | |
179 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 AIRQ21 AIRQ22 AIRQ23 | |
180 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
181 | |
182 // AIRQ24 AIRQ25 AIRQ26 AIRQ27 AIRQ28 AIRQ29 AIRQ30 AIRQ31 | |
183 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | |
184 | |
185 }; | |
186 #else | |
187 unsigned char IQ_LEVEL[IQ_NUM_INT] = | |
188 { | |
189 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
190 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, | |
191 | |
192 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
193 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01 | |
194 | |
195 }; | |
196 #endif | |
197 | |
198 | |
199 /*--------------------------------------------------------------*/ | |
200 /* IQ_FIQ_nIRQ[IQ_NUM_INT] */ | |
201 /*--------------------------------------------------------------*/ | |
202 /* Parameters : none */ | |
203 /* Return : none */ | |
204 /* Functionality : IRQ sensitivity */ | |
205 /* 0: falling edge 1: low level (default) */ | |
206 /*--------------------------------------------------------------*/ | |
207 | |
208 #if (CHIPSET == 4) | |
209 unsigned char IQ_FIQ_nIRQ[IQ_NUM_INT] = | |
210 { | |
211 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
212 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, | |
213 | |
214 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
215 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, | |
216 | |
217 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 | |
218 INTH_FIQ, INTH_FIQ, INTH_IRQ, INTH_IRQ | |
219 | |
220 }; | |
221 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 9)) | |
222 unsigned char IQ_FIQ_nIRQ[IQ_NUM_INT] = | |
223 { | |
224 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
225 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, | |
226 | |
227 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
228 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, | |
229 | |
230 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 AIRQ21 AIRQ22 AIRQ23 | |
231 INTH_FIQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, | |
232 | |
233 // AIRQ24 | |
234 INTH_IRQ | |
235 | |
236 }; | |
237 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) | |
238 unsigned char IQ_FIQ_nIRQ[IQ_NUM_INT] = | |
239 { | |
240 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
241 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, | |
242 | |
243 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
244 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, | |
245 | |
246 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 | |
247 INTH_FIQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ | |
248 | |
249 }; | |
250 #elif (CHIPSET == 12) | |
251 unsigned char IQ_FIQ_nIRQ[IQ_NUM_INT] = | |
252 { | |
253 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7 | |
254 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, | |
255 | |
256 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD | |
257 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, | |
258 | |
259 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 AIRQ21 AIRQ22 AIRQ23 | |
260 INTH_FIQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_FIQ, | |
261 | |
262 // AIRQ24 AIRQ25 AIRQ26 AIRQ27 AIRQ28 AIRQ29 AIRQ30 AIRQ31 | |
263 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ | |
264 | |
265 }; | |
266 #endif | |
267 | |
268 /*--------------------------------------------------------------*/ | |
269 /* IQ_GetBuild */ | |
270 /*--------------------------------------------------------------*/ | |
271 /* Parameters : none */ | |
272 /* Return : Return library build number */ | |
273 /* Functionality : */ | |
274 /*--------------------------------------------------------------*/ | |
275 | |
276 unsigned IQ_GetBuild(void) | |
277 { | |
278 return(IQ_BUILD); | |
279 } | |
280 | |
281 | |
282 /*--------------------------------------------------------------*/ | |
283 /* IQ_SetupInterrupts */ | |
284 /*--------------------------------------------------------------*/ | |
285 /* Parameters : none */ | |
286 /* Return : none */ | |
287 /* Functionality : Set IRQ interrupt levels and unmask */ | |
288 /*--------------------------------------------------------------*/ | |
289 | |
290 void IQ_SetupInterrupts(void) | |
291 { | |
292 int i; | |
293 char prty; | |
294 | |
295 /* Setup all interrupts to IRQ with different levels */ | |
296 for (i=INTH_TIMER;i<=IQ_NUM_INT;i++ ) | |
297 { | |
298 prty = IQ_Prty[i]; | |
299 if (prty != 0xFF) | |
300 { | |
301 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) | |
302 INTH_InitLevel(i, IQ_FIQ_nIRQ[i], prty, IQ_LEVEL[i]); | |
303 #else | |
304 INTH_InitLevel(i, INTH_IRQ, prty, IQ_LEVEL[i]); | |
305 #endif | |
306 } | |
307 INTH_DISABLEONEIT(i); | |
308 } | |
309 } | |
310 | |
311 /*--------------------------------------------------------------*/ | |
312 /* IQ_InitWaitState */ | |
313 /*--------------------------------------------------------------*/ | |
314 /* Parameters :rom, ram, spy, lcd, jtag */ | |
315 /* Return : none */ | |
316 /* Functionality : Init wait states */ | |
317 /*--------------------------------------------------------------*/ | |
318 | |
319 void IQ_InitWaitState(unsigned short rom, unsigned short ram, unsigned short spy, unsigned short lcd, unsigned short jtag) | |
320 { | |
321 volatile char ws; | |
322 | |
323 ws = * (volatile SYS_UWORD16 *) MEM_REG_nCS0; | |
324 ws &= ~WS_MASK; | |
325 ws |= rom; | |
326 * (volatile SYS_UWORD16 *) MEM_REG_nCS0 = ws; | |
327 | |
328 ws = * (volatile SYS_UWORD16 *) MEM_REG_nCS1; | |
329 ws &= ~WS_MASK; | |
330 ws |= ram; | |
331 * (volatile SYS_UWORD16 *) MEM_REG_nCS1 = ws; | |
332 | |
333 ws = * (volatile SYS_UWORD16 *) MEM_REG_nCS2; | |
334 ws &= ~WS_MASK; | |
335 ws |= spy; | |
336 * (volatile SYS_UWORD16 *) MEM_REG_nCS2 = ws; | |
337 | |
338 ws = * (volatile SYS_UWORD16 *) MEM_REG_nCS4; | |
339 ws &= ~WS_MASK; | |
340 ws |= lcd; | |
341 * (volatile SYS_UWORD16 *) MEM_REG_nCS4 = ws; | |
342 | |
343 #if ((CHIPSET != 4) && (CHIPSET != 7) && (CHIPSET != 8) && (CHIPSET != 10) && (CHIPSET != 11)) | |
344 ws = * (volatile SYS_UWORD16 *) MEM_REG_nCS5; | |
345 ws &= ~WS_MASK; | |
346 ws |= jtag; | |
347 * (volatile SYS_UWORD16 *) MEM_REG_nCS5 = ws; | |
348 #endif | |
349 | |
350 } | |
351 | |
352 void IQ_Unmask(unsigned irqNum) | |
353 { | |
354 INTH_ENABLEONEIT(irqNum); | |
355 } | |
356 | |
357 void IQ_Mask(unsigned irqNum) | |
358 { | |
359 INTH_DISABLEONEIT(irqNum); | |
360 } | |
361 | |
362 void IQ_MaskAll(void) | |
363 { | |
364 INTH_DISABLEALLIT; | |
365 } | |
366 | |
367 | |
368 /* | |
369 * IQ_GetJtagId | |
370 * | |
371 * JTAG part identifier | |
372 */ | |
373 SYS_UWORD16 IQ_GetJtagId(void) | |
374 { | |
375 unsigned short v; | |
376 | |
377 v = *( (volatile unsigned short *) (MEM_JTAGID_PART)); | |
378 return(v); | |
379 } | |
380 | |
381 | |
382 | |
383 /* | |
384 * IQ_GetDeviceVersion | |
385 * | |
386 * Read from CLKM module | |
387 */ | |
388 SYS_UWORD16 IQ_GetDeviceVersion(void) | |
389 { | |
390 SYS_UWORD16 v; | |
391 | |
392 v = *( (volatile SYS_WORD16 *) (MEM_JTAGID_VER)); | |
393 return(v); | |
394 } | |
395 | |
396 | |
397 //// !!!! TO BE REMOVED IN NEXT CONDAT RELEASE >2.55 | |
398 /* | |
399 * IQ_GetDeviceVersion | |
400 * | |
401 * Read from CLKM module | |
402 */ | |
403 SYS_UWORD16 IQ_GetPoleStarVersion(void) | |
404 { | |
405 SYS_UWORD16 v; | |
406 | |
407 v = *( (volatile SYS_UWORD16 *) (MEM_JTAGID_VER)); | |
408 return(v); | |
409 } | |
410 | |
411 | |
412 | |
413 /* | |
414 * IQ_RamBasedLead | |
415 * | |
416 * Returns TRUE if the LEAD has RAM and needs to be downloaded | |
417 * | |
418 */ | |
419 | |
420 SYS_BOOL IQ_RamBasedLead(void) | |
421 { | |
422 unsigned short id; | |
423 | |
424 id = IQ_GetJtagId(); | |
425 | |
426 #if (CHIPSET != 7) | |
427 return ((id == SATURN || id == HERCRAM || id == 0xB2AC) ? 1 : 0); | |
428 #else | |
429 // Calypso G2 rev. A and Samson share the same JTAG ID | |
430 return (0); | |
431 #endif | |
432 } | |
433 | |
434 /* | |
435 * IQ_Power | |
436 * | |
437 * Switch-on or off the board | |
438 * | |
439 * Parameters : BOOL power : 1 to power-on (maintain power) | |
440 * 0 to power-off | |
441 * | |
442 * See A-Sample board specification | |
443 */ | |
444 void IQ_Power(SYS_UWORD8 power) | |
445 { | |
446 // This is only implemented for the A-Sample | |
447 } | |
448 | |
449 /* | |
450 * IQ_GetRevision | |
451 * | |
452 * Silicon revision - Read from JTAG version code | |
453 */ | |
454 SYS_UWORD16 IQ_GetRevision(void) | |
455 { | |
456 unsigned short v; | |
457 | |
458 v = *( (volatile unsigned short *) (MEM_JTAGID_VER)); | |
459 return(v); | |
460 } | |
461 | |
462 #if (TI_PROFILER == 1) | |
463 | |
464 /* | |
465 * IQ_InitLevel | |
466 * | |
467 * Parameters : interrupt, FIQ_nIRQ, priority, edge | |
468 * Return : none | |
469 * Functionality : initialize Interrupt Level Registers | |
470 */ | |
471 | |
472 void IQ_InitLevel ( SYS_UWORD16 inputInt, | |
473 SYS_UWORD16 FIQ_nIRQ, | |
474 SYS_UWORD16 priority, | |
475 SYS_UWORD16 edge ) | |
476 { | |
477 volatile SYS_UWORD16 *inthLevelReg = (SYS_UWORD16 *) INTH_EXT_REG; | |
478 | |
479 inthLevelReg = inthLevelReg + inputInt; | |
480 | |
481 *inthLevelReg = (FIQ_nIRQ | (priority << 6) | (edge << 1)); | |
482 } | |
483 | |
484 #endif |