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comparison gsm-fw/bsp/niq32.c @ 143:afceeeb2cba1

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Our nuc-fw is destined to become gsm-fw, so I went ahead and did the big hg mv
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Tue, 12 Nov 2013 05:35:48 +0000
parents nuc-fw/bsp/niq32.c@035672b72f9b
children 595192258bc9
comparison
equal deleted inserted replaced
142:15d5977390c2 143:afceeeb2cba1
1 /******************************************************************************
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
3
4 Property of Texas Instruments -- For Unrestricted Internal Use Only
5 Unauthorized reproduction and/or distribution is strictly prohibited. This
6 product is protected under copyright law and trade secret law as an
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
8 rights reserved.
9
10
11 Filename : niq32.c
12
13 Description : Nucleus IQ initializations
14
15 Project : Drivers
16
17 Author : proussel@ti.com Patrick Roussel.
18
19 Version number : 1.25
20
21 Date : 08/22/03
22
23 Previous delta : 12/19/00 14:24:51
24
25 *******************************************************************************/
26
27 #include "../include/config.h"
28 #include "../include/sys_types.h"
29
30 #include "inth.h"
31 #include "mem.h"
32 #include "iq.h"
33 #include "ulpd.h"
34 #include "armio.h"
35
36 #include "../serial/serialswitch.h"
37
38 #if 0
39
40 /* original maze of includes */
41
42 #if(OP_L1_STANDALONE == 0)
43 #include "debug.cfg"
44 #include "rv/rv_defined_swe.h"
45 #include "rtc/board/rtc_config.h"
46 #else
47 #include "l1_macro.h"
48 #include "l1_confg.h"
49 #endif
50
51 #if(OP_L1_STANDALONE == 0)
52 #include "swconfig.cfg"
53 #ifdef BLUETOOTH_INCLUDED
54 #include "btemobile.cfg"
55 #ifdef BT_CLK_REQ_INT
56 #include "board/bth_drv.h"
57 #endif
58 #endif
59 #endif
60
61
62 #if(L1_DYN_DSP_DWNLD == 1)
63 #include "l1_api_hisr.h"
64 #endif
65
66 #if (OP_L1_STANDALONE == 0)
67 #include "main/sys_types.h"
68 #else
69 #include "sys_types.h"
70 #endif
71
72 #if (CHIPSET == 12)
73 #include "sys_inth.h"
74 #else
75 #include "inth/inth.h"
76 #include "memif/mem.h"
77 #if (OP_L1_STANDALONE == 1)
78 #include "serialswitch_core.h"
79 #else
80 #include "uart/serialswitch.h"
81 #endif
82
83 #if (OP_L1_STANDALONE == 0)
84 #include "sim/sim.h"
85 #endif
86 #endif
87
88 #include "abb/abb_core_inth.h" // for External Interrupt
89 #define IQ_H
90 #include "inth/iq.h"
91 #include "ulpd/ulpd.h"
92 #if (BOARD == 34)
93 #include "csmi/csmi.h"
94 #endif
95
96 #if (defined RVM_DAR_SWE) && (defined _GSM)
97 extern void dar_watchdog_reset(void);
98 #endif
99
100 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45))
101 #include "armio/armio.h"
102 #if (OP_L1_STANDALONE == 0)
103 #include "uart/uartfax.h"
104 #endif
105 #endif
106
107 /* end of original include maze */
108 #endif
109
110 /* External declaration */
111 extern void GAUGING_Handler(void);
112 extern void TMT_Timer_Interrupt(void);
113 #if 0 //(OP_L1_STANDALONE == 1)
114 extern void TM_Timer1Handler(void);
115 #endif
116 extern void kpd_key_handler(void);
117 extern void TP_FrameIntHandler(void);
118
119 #if 1 //(OP_L1_STANDALONE == 0)
120 #if (defined RVM_MPM_SWE)
121 extern void MPM_InterruptHandler(void);
122 #endif
123
124 #if (TI_PROFILER == 1)
125 extern void ti_profiler_tdma_action(void);
126 #endif
127
128 #if(RF_FAM==35)
129 extern void TSP_RxHandler(void);
130 #endif
131
132 extern void RTC_GaugingHandler(void);
133 extern void RTC_ItTimerHandle(void);
134 extern void RTC_ItAlarmHandle(void);
135 #endif
136
137 /* Global variables */
138 unsigned IQ_TimerCount1; /* Used to check if timer is incrementing */
139 unsigned IQ_TimerCount2; /* Used to check if timer is incrementing */
140 unsigned IQ_TimerCount; /* Used to check if timer is incrementing */
141 unsigned IQ_DummyCount; /* Used to check if dummy IT */
142 unsigned IQ_FrameCount; /* Used to check if Frame IT TPU*/
143 unsigned IQ_GsmTimerCount; /* Used to check if GSM Timer IT */
144
145 /* FreeCalypso: the following interrupt handlers remain to be integrated */
146 #define SIM_IntHandler IQ_Dummy
147 #define SIM_CD_IntHandler IQ_Dummy
148
149 /*--------------------------------------------------------------*/
150 /* irqHandlers */
151 /*--------------------------------------------------------------*/
152 /* Parameters :none */
153 /* Return : none */
154 /* Functionality : Table of interrupt handlers */
155 /* These MUST be 32-bit entries */
156 /*--------------------------------------------------------------*/
157
158 SYS_FUNC irqHandlers[IQ_NUM_INT] =
159 {
160 IQ_TimerHandler, /* Watchdog timer */
161 IQ_TimerHandler1, /* timer 1 */
162 IQ_TimerHandler2, /* timer 2 */
163 IQ_Dummy, /* AIRQ 3 */
164 IQ_FrameHandler, /* TPU Frame It AIRQ 4 */
165 IQ_Dummy, /* AIRQ 5 */
166 #if 1 //(OP_L1_STANDALONE == 0)
167 SIM_IntHandler, /* AIRQ 6 */
168 #else
169 IQ_Dummy, /* AIRQ 6 */
170 #endif
171 #if ((CHIPSET == 2) || (CHIPSET == 3))
172 SER_uart_handler, /* AIRQ 7 */
173 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
174 SER_uart_modem_handler, /* AIRQ 7 */
175 #endif
176 #if 1 //((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41))
177 // CC test 0316
178 IQ_KeypadGPIOHandler, /* AIRQ 8 */
179 // end
180 #else
181 IQ_KeypadHandler, /* AIRQ 8 */
182 #endif
183 IQ_Rtc_Handler, /* AIRQ 9 RTC Timer*/
184 #if ((CHIPSET == 2) || (CHIPSET == 3))
185 IQ_RtcA_GsmTim_Handler, /* AIRQ 10 RTC ALARM OR ULPD GSM TIMER*/
186 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
187 IQ_RtcA_Handler, /* AIRQ 10 RTC ALARM */
188 #endif
189 IQ_Gauging_Handler, /* AIRQ 11 ULPD GAUGING */
190 IQ_External, /* AIRQ 12 */
191 IQ_Dummy, /* AIRQ 13 */
192 IQ_Dummy, /* DMA interrupt */
193 #if (CHIPSET == 4)
194 IQ_Dummy, /* LEAD */
195 IQ_Dummy, /* SIM card-detect fast interrupt */
196 IQ_Dummy, /* External fast interrupt */
197 SER_uart_irda_handler, /* UART IrDA interrupt */
198 IQ_GsmTim_Handler /* ULPD GSM timer */
199 #elif ((CHIPSET == 5) || (CHIPSET == 6))
200 IQ_Dummy, /* LEAD */
201 IQ_Dummy, /* SIM card-detect fast interrupt */
202 IQ_Dummy, /* External fast interrupt */
203 SER_uart_irda_handler, /* UART IrDA interrupt */
204 IQ_GsmTim_Handler, /* ULPD GSM timer */
205 #if (BOARD == 34)
206 IQ_IcrHandler32,
207 #else
208 IQ_Dummy, /* Not mapped interrupt */
209 #endif
210 IQ_Dummy, /* Not mapped interrupt */
211 IQ_Dummy, /* Not mapped interrupt */
212 IQ_Dummy, /* Not mapped interrupt */
213 IQ_Dummy /* GEA interrupt */
214 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11))
215 #if 0 //(L1_DYN_DSP_DWNLD == 1)
216 IQ_ApiHandler, /* LEAD */
217 #else
218 IQ_Dummy, /* LEAD */
219 #endif
220 IQ_Dummy, /* SIM card-detect fast interrupt */
221 IQ_Dummy, /* External fast interrupt */
222 SER_uart_irda_handler, /* UART IrDA interrupt */
223 IQ_GsmTim_Handler, /* ULPD GSM timer */
224 IQ_Dummy /* GEA interrupt */
225 #elif (CHIPSET == 9)
226 IQ_Dummy, /* LEAD */
227 IQ_Dummy, /* SIM card-detect fast interrupt */
228 IQ_Dummy, /* External fast interrupt */
229 SER_uart_irda_handler, /* UART IrDA interrupt */
230 IQ_GsmTim_Handler, /* ULPD GSM timer */
231 IQ_Dummy, /* Not mapped interrupt */
232 IQ_Dummy, /* Not mapped interrupt */
233 IQ_Dummy, /* Not mapped interrupt */
234 IQ_Dummy, /* Not mapped interrupt */
235 IQ_Dummy /* Reserved */
236 #else
237 IQ_Dummy /* LEAD */
238 #endif
239 };
240
241 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
242 /*--------------------------------------------------------------*/
243 /* fiqHandlers */
244 /*--------------------------------------------------------------*/
245 /* Parameters :none */
246 /* Return :none */
247 /* Functionality : Table of interrupt handlers */
248 /* These MUST be 32-bit entries */
249 /*--------------------------------------------------------------*/
250
251 SYS_FUNC fiqHandlers[IQ_NUM_INT] =
252 {
253 IQ_Dummy, /* Watchdog timer */
254 IQ_Dummy, /* timer 1 */
255 IQ_Dummy, /* timer 2 */
256 #if ((OP_L1_STANDALONE == 0) && (RF_FAM == 35))
257 TSP_RxHandler, /* 3 TSP */
258 #else
259 IQ_Dummy, /* AIRQ 3 */
260 #endif
261 IQ_Dummy, /* TPU Frame It AIRQ 4 */
262 IQ_Dummy, /* AIRQ 5 */
263 IQ_Dummy, /* AIRQ 6 */
264 IQ_Dummy, /* AIRQ 7 */
265 IQ_Dummy, /* AIRQ 8 */
266 IQ_Dummy, /* AIRQ 9 RTC Timer */
267 IQ_Dummy, /* AIRQ 10 RTC ALARM */
268 IQ_Dummy, /* AIRQ 11 ULPD GAUGING */
269 IQ_Dummy, /* AIRQ 12 */
270 IQ_Dummy, /* AIRQ 13 Spi Tx Rx interrupt */
271 IQ_Dummy, /* DMA interrupt */
272 IQ_Dummy, /* LEAD */
273 #if 1 //(OP_L1_STANDALONE == 0)
274 SIM_CD_IntHandler, /* SIM card-detect fast interrupt */
275 #else
276 IQ_Dummy, /* SIM card-detect fast interrupt */
277 #endif
278 IQ_Dummy, /* External fast interrupt */
279 IQ_Dummy, /* UART_IRDA interrupt */
280 #if (CHIPSET == 4)
281 IQ_Dummy /* ULPD GSM timer */
282 #elif ((CHIPSET == 5) || (CHIPSET == 6))
283 IQ_Dummy, /* ULPD GSM timer */
284 IQ_Dummy, /* Not mapped interrupt */
285 IQ_Dummy, /* Not mapped interrupt */
286 IQ_Dummy, /* Not mapped interrupt */
287 IQ_Dummy, /* Not mapped interrupt */
288 IQ_Dummy /* GEA interrupt */
289 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11))
290 IQ_Dummy, /* ULPD GSM timer */
291 IQ_Dummy /* GEA timer */
292 #elif (CHIPSET == 9)
293 IQ_Dummy, /* ULPD GSM timer */
294 IQ_Dummy, /* Not mapped interrupt */
295 IQ_Dummy, /* Not mapped interrupt */
296 IQ_Dummy, /* Not mapped interrupt */
297 IQ_Dummy, /* Not mapped interrupt */
298 IQ_Dummy /* Reserved */
299 #endif
300 };
301 #endif
302
303 /*--------------------------------------------------------------*/
304 /* IQ_Gauging_Handler */
305 /*--------------------------------------------------------------*/
306 /* Parameters :none */
307 /* Return : none */
308 /* Functionality : Handle unused interrupts */
309 /*--------------------------------------------------------------*/
310 void IQ_Gauging_Handler(void)
311 {
312 #if 0
313 // FreeCalypso: code not integrated yet
314 GAUGING_Handler();
315 #if (OP_L1_STANDALONE == 0)
316 RTC_GaugingHandler();
317 #endif
318 #endif
319 }
320
321
322 /*--------------------------------------------------------------*/
323 /* IQ_External */
324 /*--------------------------------------------------------------*/
325 /* Parameters : none */
326 /* Return : none */
327 /* Functionality : Handle External IRQ mapped on ABB. */
328 /*--------------------------------------------------------------*/
329 void IQ_External(void)
330 {
331 #if (CHIPSET == 12)
332 // Mask external interrupt 12
333 F_INTH_DISABLE_ONE_IT(C_INTH_ABB_IRQ_IT);
334 #else
335 // Mask external interrupt 12
336 IQ_Mask(IQ_EXT);
337 #endif
338
339 // The external IRQ is mapped on the ABB interrupt.
340 // The associated HISR ABB_Hisr is activated on reception on the external IRQ.
341 #if 0
342 // FreeCalypso: code not integrated yet
343 if(Activate_ABB_HISR())
344 {
345 #if (CHIPSET == 12)
346 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT);
347 #else
348 // Mask external interrupt 12
349 IQ_Unmask(IQ_EXT);
350 #endif
351 }
352 #endif
353 }
354
355 /*--------------------------------------------------------------*/
356 /* IQ_Dummy */
357 /*--------------------------------------------------------------*/
358 /* Parameters :none */
359 /* Return : none */
360 /* Functionality : Handle unused interrupts */
361 /*--------------------------------------------------------------*/
362 void IQ_Dummy(void)
363 {
364 IQ_DummyCount++;
365 }
366
367 /*--------------------------------------------------------------*/
368 /* IQ_RTCHandler */
369 /*--------------------------------------------------------------*/
370 /* Parameters :none */
371 /* Return : none */
372 /* Functionality : Handle RTC Time interrupts */
373 /*--------------------------------------------------------------*/
374
375 void IQ_Rtc_Handler(void)
376 {
377 #if 0 //(OP_L1_STANDALONE == 0)
378 RTC_ItTimerHandle();
379 #endif
380 }
381
382 /*--------------------------------------------------------------*/
383 /* IQ_RtcA_GsmTim_Handler */
384 /*--------------------------------------------------------------*/
385 /* Parameters :none */
386 /* Return : none */
387 /* Functionality : Handle RTC ALARM or GAUGING interrupts */
388 /*--------------------------------------------------------------*/
389
390 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
391 void IQ_RtcA_Handler(void)
392 {
393 #if 0 //(OP_L1_STANDALONE == 0)
394 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */
395 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM )
396 RTC_ItAlarmHandle();
397 #endif
398 }
399
400 void IQ_GsmTim_Handler(void)
401 {
402
403 if ( (* (SYS_UWORD16 *) ULPD_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM )
404 {
405 // it is GSM Timer it.....
406 IQ_GsmTimerCount++;
407 }
408 }
409 #else
410 void IQ_RtcA_GsmTim_Handler(void)
411 {
412 #if (OP_L1_STANDALONE == 0)
413 if ( (* (SYS_UWORD16 *) ULPD_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM )
414 {
415 // it is GSM Timer it.....
416 IQ_GsmTimerCount++;
417 }
418 else
419 {
420 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */
421 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM )
422 RTC_ItAlarmHandle();
423 }
424 #endif
425 }
426 #endif
427
428 /*--------------------------------------------------------------*/
429 /* IQ_TimerHandler */
430 /*--------------------------------------------------------------*/
431 /* Parameters :none */
432 /* Return : none */
433 /* Functionality : Handle Timer interrupts */
434 /*--------------------------------------------------------------*/
435 void IQ_TimerHandler(void)
436 {
437 IQ_TimerCount++;
438 TMT_Timer_Interrupt();
439 #if 0 //(defined RVM_DAR_SWE) && (defined _GSM)
440 dar_watchdog_reset();
441 #endif
442 }
443
444 /*--------------------------------------------------------------*/
445 /* IQ_FramerHandler */
446 /*--------------------------------------------------------------*/
447 /* Parameters :none */
448 /* Return : none */
449 /* Functionality : Handle Timer interrupts */
450 /*--------------------------------------------------------------*/
451 void IQ_FrameHandler(void)
452 {
453 IQ_FrameCount++;
454 TMT_Timer_Interrupt();
455 #if 0
456 // FreeCalypso: that L1 or whatever code hasn't been integrated yet
457 TP_FrameIntHandler();
458 #endif
459 #if (OP_L1_STANDALONE == 0)
460 #if (TI_PROFILER == 1)
461 // TDMA treatment for profiling buffer
462 ti_profiler_tdma_action();
463 #endif
464 #endif
465 }
466
467 /*--------------------------------------------------------------*/
468 /* IQ_TimerHandler1 */
469 /*--------------------------------------------------------------*/
470 /* Parameters :none */
471 /* Return : none */
472 /* Functionality : Handle Timer 1 interrupts */
473 /*--------------------------------------------------------------*/
474 void IQ_TimerHandler1(void)
475 {
476 IQ_TimerCount1++;
477 #if (OP_L1_STANDALONE == 1)
478 TM_Timer1Handler();
479 #endif
480 }
481
482 /*--------------------------------------------------------------*/
483 /* IQ_TimerHandler2 */
484 /*--------------------------------------------------------------*/
485 /* Parameters :none */
486 /* Return : none */
487 /* Functionality : Handle Timer 2 interrupts */
488 /*--------------------------------------------------------------*/
489 void IQ_TimerHandler2(void)
490 {
491 IQ_TimerCount2++;
492 #if !CONFIG_GSM
493 TMT_Timer_Interrupt();
494 #endif
495 }
496
497 #if 0 //(L1_DYN_DSP_DWNLD == 1)
498 /*-------------------------------------------------------*/
499 /* IQ_ApiHandler() */
500 /*-------------------------------------------------------*/
501 /* Parameters : none */
502 /* Return : none */
503 /* Functionality : API int management */
504 /*-------------------------------------------------------*/
505 void IQ_ApiHandler(void)
506 {
507 l1_api_handler();
508 } /* IQ_ApiHandler() */
509 #endif
510
511
512 /*--------------------------------------------------------------*/
513 /* IQ_IRQ_isr */
514 /*--------------------------------------------------------------*/
515 /* Parameters :none */
516 /* Return : none */
517 /* Functionality : HHandle IRQ interrupts */
518 /*--------------------------------------------------------------*/
519 void IQ_IRQ_isr(void)
520 {
521 irqHandlers[((* (SYS_UWORD16 *) INTH_B_IRQ_REG) & INTH_SRC_NUM)](); /* ACK IT */
522 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_IRQ); /* valid next IRQ */
523 }
524
525 /*--------------------------------------------------------------*/
526 /* IQ_FIQ_isr */
527 /*--------------------------------------------------------------*/
528 /* Parameters :none */
529 /* Return : none */
530 /* Functionality : Handle FIQ interrupts */
531 /*--------------------------------------------------------------*/
532 void IQ_FIQ_isr(void)
533 {
534 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
535 fiqHandlers[((* (SYS_UWORD16 *) INTH_B_FIQ_REG) & INTH_SRC_NUM)](); /* ACK IT */
536 #endif
537 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_FIQ); /* valid next FIQ */
538 }
539
540 /*--------------------------------------------------------------*/
541 /* IQ_KeypadGPIOHandler */
542 /*--------------------------------------------------------------*/
543 /* Parameters : none */
544 /* Return : none */
545 /* Functionality : Handle keypad and GPIO interrupts */
546 /*--------------------------------------------------------------*/
547 // CC test 0316
548 //#include "rvm/rvm_use_id_list.h"
549 //#include "rvf/rvf_api.h"
550 //static char debug_buffer[50];
551 // end
552
553 void IQ_KeypadGPIOHandler(void)
554 {
555
556 #if 0 //(OP_L1_STANDALONE == 0)
557 /*
558 * GPIO interrupt must be checked before the keypad interrupt. The GPIO
559 * status bit is reset when the register is read.
560 */
561
562 if (AI_CheckITSource (ARMIO_GPIO_INT))
563
564 // CC test 0315
565 {
566 AI_MaskIT (ARMIO_MASKIT_GPIO);
567 //sprintf(debug_buffer, "GPIO_Interrupt");
568 //rvf_send_trace(debug_buffer, 40, NULL_PARAM, RV_TRACE_LEVEL_ERROR, RVT_USE_ID);
569 AI_UnmaskIT(ARMIO_MASKIT_GPIO); //0x0002
570 // end
571 /*
572 #ifdef RVM_MPM_SWE
573 // check if the SWE has been started
574 MPM_InterruptHandler ();
575 #elif BT_CLK_REQ_INT
576
577 BT_DRV_ClkReqInterruptHandler( );
578 #else
579 UAF_DTRInterruptHandler ();
580 #endif
581 */
582 }
583 if (AI_CheckITSource (ARMIO_KEYPAD_INT))
584 {
585 // CC test 0316
586 //sprintf(debug_buffer, "Key_Interrupt");
587 //rvf_send_trace(debug_buffer, 40, NULL_PARAM, RV_TRACE_LEVEL_ERROR, RVT_USE_ID);
588 // end
589 kpd_key_handler ();
590 }
591
592 #endif
593 }