FreeCalypso > hg > freecalypso-sw

comparison gsm-fw/finlink/ld-script.src @ 143:afceeeb2cba1

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Our nuc-fw is destined to become gsm-fw, so I went ahead and did the big hg mv
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Tue, 12 Nov 2013 05:35:48 +0000
parents nuc-fw/finlink/ld-script.src@2c5160a9d652
children 2abe6ade042d
comparison
equal deleted inserted replaced
142:15d5977390c2 143:afceeeb2cba1
1 dnl This ld script source is fed through m4 in order to fill in
2 dnl those settings which depend on the configuration.
3 dnl Memory region sizes are set in ../include/config.m4, generated
4 dnl by the configuration mechanism based on the selected target,
5 dnl and the Makefile prepends flash.m4 or xram.m4 to select the
6 dnl type of image we are linking: either the regular flashable image,
7 dnl or a RAM-only test image (to be loaded via fc-xram) that does not
8 dnl touch the flash and pretends as if the flash doesn't even exist.
9
10 /*
11 * FreeCalypso ld script for the Buildmem build
12 */
13
14 ENTRY(ifelse(Buildmem,XRAM,_FlashorXram_entry,0))
15
16 include(`../include/config.m4')dnl
17 MEMORY {
18 ifelse(Buildmem,FLASH,
19 ` FLASH_OVERLAY : ORIGIN = 0, LENGTH = 0x2000
20 FLASH : ORIGIN = 0x2000, LENGTH = CONFIG_FWFLASH_SIZE - 0x2000')
21 IRAM : ORIGIN = 0x00800000, LENGTH = CONFIG_IRAM_SIZE
22 XRAM : ORIGIN = 0x01000000, LENGTH = CONFIG_XRAM_SIZE
23 }
24
25 SECTIONS {
26 /* XIP code, going into flash or XRAM emulating flash */
27 xip.text : {
28 *(xip.text*)
29 xipcode.o(.text*)
30 *libplus.xip.a:(.text*)
31 *librv.a:(.text*)
32 *libsprintf.a:(.text*)
33 /* let's put the ARM->Thumb veneers in the XIP section */
34 *(.glue_7)
35 } > Buildmem
36
37 /* copy-to-IRAM code */
38 iram.text 0x80001C : {
39 /* the 7 exception and interrupt vectors @ 0x80001C */
40 *(iram.vectors)
41 *(iram.text*)
42 iramcode.o(.text*)
43 *libplus.iram.a:(.text*)
44 *libc.a:(.text*)
45 *libgcc.a:(.text*)
46 } > IRAM AT> Buildmem
47 __iramtext_ram_addr = ADDR(iram.text);
48 __iramtext_flash_addr = LOADADDR(iram.text);
49 __iramtext_size = SIZEOF(iram.text);
50
51 /* all .rodata will stay in flash */
52 .rodata : {
53 *(.rodata*)
54 } > Buildmem
55
56 /*
57 * All .data will go into XRAM.
58 * For the flash build we'll have a step that copies
59 * the .data section from flash to XRAM; for the RAM-only
60 * build it goes directly into XRAM and stays there.
61 */
62 .data : {
63 *(.data*)
64 } > XRAM AT> Buildmem
65 ifelse(Buildmem,FLASH,
66 ` __initdata_ram_addr = ADDR(.data);
67 __initdata_flash_addr = LOADADDR(.data);
68 __initdata_size = SIZEOF(.data);
69 ')dnl
70
71 /* we have two kinds of BSS: internal and external */
72 int.bss (NOLOAD) : {
73 *(int.bss*)
74 iramcode.o(.bss* COMMON)
75 *libplus.iram.a:(.bss* COMMON)
76 *libc.a:(.bss* COMMON)
77 *libgcc.a:(.bss* COMMON)
78 . = ALIGN(4);
79 } > IRAM
80 __intbss_start = ADDR(int.bss);
81 __intbss_size = SIZEOF(int.bss);
82
83 ext.bss (NOLOAD) : {
84 *(ext.bss*)
85 xipcode.o(.bss* COMMON)
86 *libplus.xip.a:(.bss* COMMON)
87 *librv.a:(.bss* COMMON)
88 *libsprintf.a:(.bss* COMMON)
89 . = ALIGN(4);
90 } > XRAM
91 __extbss_start = ADDR(ext.bss);
92 __extbss_size = SIZEOF(ext.bss);
93
94 /* finally, we have "raw RAM": like BSS, but we don't zero it out */
95 int.ram (NOLOAD) : {
96 *(int.ram*)
97 *(system_stack)
98 *(irq_stack)
99 *(fiq_stack)
100 *(timer_hisr_stack)
101 . = ALIGN(4);
102 _iram_end = .;
103 } > IRAM
104
105 ext.ram (NOLOAD) : {
106 *(ext.ram*)
107 . = ALIGN(4);
108 _xram_end = .;
109 } > XRAM
110 }