FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/nucleus/demo/calirq.h @ 143:afceeeb2cba1
Our nuc-fw is destined to become gsm-fw, so I went ahead and did the big hg mv
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
---|---|
date | Tue, 12 Nov 2013 05:35:48 +0000 |
parents | nuc-fw/nucleus/demo/calirq.h@85994b210f6a |
children |
comparison
equal
deleted
inserted
replaced
142:15d5977390c2 | 143:afceeeb2cba1 |
---|---|
1 /* | |
2 * Definitions for Calypso IRQ numbers and the related registers | |
3 * Added to the FreeNucleus Calypso port by Spacefalcon the Outlaw. | |
4 * | |
5 * This header is usable from both .c and .S source files. | |
6 */ | |
7 | |
8 #ifndef _CALYPSO_IRQ_H | |
9 #define _CALYPSO_IRQ_H | |
10 | |
11 #define IRQ_WATCHDOG 0 | |
12 #define IRQ_TIMER1 1 | |
13 #define IRQ_TIMER2 2 | |
14 #define IRQ_TSP_RX 3 | |
15 #define IRQ_TPU_FRAME 4 | |
16 #define IRQ_TPU_PAGE 5 | |
17 #define IRQ_SIMCARD 6 | |
18 #define IRQ_UART_MODEM 7 | |
19 #define IRQ_KEYPAD_GPIO 8 | |
20 #define IRQ_RTC_TIMER 9 | |
21 #define IRQ_RTC_ALARM_I2C 10 | |
22 #define IRQ_ULPD_GAUGING 11 | |
23 #define IRQ_EXTERNAL 12 | |
24 #define IRQ_SPI 13 | |
25 #define IRQ_DMA 14 | |
26 #define IRQ_API 15 | |
27 #define IRQ_SIM_DETECT 16 | |
28 #define IRQ_EXTERNAL_FIQ 17 | |
29 #define IRQ_UART_IRDA 18 | |
30 #define IRQ_ULPD_GSM_TIMER 19 | |
31 #define IRQ_GEA 20 | |
32 | |
33 #define MAX_IRQ_NUM 20 | |
34 | |
35 #define INTH_BASE_ADDR 0xFFFFFA00 | |
36 | |
37 #ifdef __ASSEMBLER__ | |
38 | |
39 /* | |
40 * Assembly source with cpp | |
41 * | |
42 * The most convenient way to access registers like these from ARM | |
43 * assembly is to load the base address of the register block in some | |
44 * ARM register, using only one ldr rN, =xxx instruction and only one | |
45 * literal pool entry, and then access various registers in the block | |
46 * from the same base using the immediate offset addressing mode. | |
47 * | |
48 * Here we define the offsets for the usage scenario above. | |
49 */ | |
50 | |
51 #define IT_REG1 0x00 | |
52 #define IT_REG2 0x02 | |
53 #define MASK_IT_REG1 0x08 | |
54 #define MASK_IT_REG2 0x0A | |
55 #define IRQ_NUM 0x10 | |
56 #define FIQ_NUM 0x12 | |
57 #define IRQ_CTRL 0x14 | |
58 #define ILR_OFFSET 0x20 | |
59 | |
60 #else | |
61 | |
62 /* | |
63 * C source | |
64 * | |
65 * For access from C, we define the layout of the INTH register block | |
66 * as a struct, and then define a pleudo-global-var for easy "volatile" | |
67 * access. | |
68 */ | |
69 | |
70 struct inth_regs { | |
71 unsigned short it_reg1; | |
72 unsigned short it_reg2; | |
73 unsigned short pad1[2]; | |
74 unsigned short mask_it_reg1; | |
75 unsigned short mask_it_reg2; | |
76 unsigned short pad2[2]; | |
77 unsigned short irq_num; | |
78 unsigned short fiq_num; | |
79 unsigned short irq_ctrl; | |
80 unsigned short pad3[5]; | |
81 unsigned short ilr_irq[MAX_IRQ_NUM+1]; | |
82 }; | |
83 | |
84 #define INTH_REGS (*(volatile struct inth_regs *) INTH_BASE_ADDR) | |
85 | |
86 /* | |
87 * C code can now access INTH registers like this: | |
88 * | |
89 * old_mask = INTH_REGS.mask_it_reg1; | |
90 * INTH_REGS.mask_it_reg1 = new_mask; | |
91 */ | |
92 | |
93 #endif | |
94 | |
95 #endif /* _CALYPSO_IRQ_H */ |