FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/nucleus/init.S @ 143:afceeeb2cba1
Our nuc-fw is destined to become gsm-fw, so I went ahead and did the big hg mv
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Tue, 12 Nov 2013 05:35:48 +0000 |
parents | nuc-fw/nucleus/init.S@2c5160a9d652 |
children | 9df7f9c72e17 |
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142:15d5977390c2 | 143:afceeeb2cba1 |
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1 /* | |
2 * This is a stripped-down version of the Nucleus PLUS int.s module, | |
3 * reduced to handle just Nucleus PLUS assembly initialization. | |
4 * The IRQ shell code has been moved into irqshell.S, the | |
5 * platform-dependent timer code will be moving somewhere else, | |
6 * and there no ARM architectured vectors in here: that part will be | |
7 * handled by the linked application. | |
8 * | |
9 ************************************************************************ | |
10 * | |
11 * FILE NAME VERSION | |
12 * | |
13 * int.s Nucleus PLUS\ARM925\Code Composer 1.14.1 | |
14 * | |
15 * COMPONENT | |
16 * | |
17 * IN - Initialization | |
18 * | |
19 * DESCRIPTION | |
20 * | |
21 * This file contains the target processor dependent initialization | |
22 * routines and data. | |
23 * | |
24 * DATA STRUCTURES | |
25 * | |
26 * INT_Vectors Interrupt vector table | |
27 * | |
28 * FUNCTIONS | |
29 * | |
30 * INT_Initialize Target initialization | |
31 * INT_Vectors_Loaded Returns a NU_TRUE if all the | |
32 * default vectors are loaded | |
33 * INT_Setup_Vector Sets up an actual vector | |
34 * | |
35 * DEPENDENCIES | |
36 * | |
37 * nucleus.h System constants | |
38 * | |
39 * HISTORY | |
40 * | |
41 * NAME DATE REMARKS | |
42 * | |
43 * B. Ronquillo 08-28-2002 Released version 1.14.1 | |
44 * | |
45 ************************************************************************ | |
46 */ | |
47 | |
48 #define NU_SOURCE_FILE | |
49 | |
50 /* | |
51 ****************************** | |
52 * INCLUDE ASSEMBLY CONSTANTS * | |
53 ****************************** | |
54 * Define constants used in low-level initialization. | |
55 */ | |
56 | |
57 #include "asm_defs.h" | |
58 | |
59 .code 32 | |
60 | |
61 /* stack sizes - matching the original asm_defs.inc for now */ | |
62 #define SYSTEM_STACK_SIZE 1024 | |
63 #define IRQ_STACK_SIZE 128 | |
64 #define FIQ_STACK_SIZE 128 | |
65 #define HISR_STACK_SIZE 2048 /* this is for the timer HISR */ | |
66 #define HISR_PRIORITY 2 /* ditto */ | |
67 | |
68 /* | |
69 ********************************** | |
70 * SYSTEM STACK DECLARATIONS * | |
71 ********************************** | |
72 */ | |
73 .section "system_stack","aw",%nobits | |
74 .balign 4 | |
75 | |
76 INT_System_Stk_Limit: | |
77 | |
78 .space SYSTEM_STACK_SIZE | |
79 | |
80 .balign 4 | |
81 | |
82 INT_System_Stack_SP: | |
83 | |
84 /* | |
85 ********************************** | |
86 * IRQ STACK DECLARATIONS * | |
87 ********************************** | |
88 */ | |
89 .section "irq_stack","aw",%nobits | |
90 .balign 4 | |
91 | |
92 .space IRQ_STACK_SIZE | |
93 | |
94 .balign 4 | |
95 | |
96 INT_IRQ_Stack_SP: | |
97 | |
98 /* | |
99 ********************************** | |
100 * FIQ STACK DECLARATIONS * | |
101 ********************************** | |
102 */ | |
103 .section "fiq_stack","aw",%nobits | |
104 .balign 4 | |
105 | |
106 .space FIQ_STACK_SIZE | |
107 | |
108 .balign 4 | |
109 | |
110 INT_FIQ_Stack_SP: | |
111 | |
112 /* | |
113 ********************************** | |
114 * TIMER HISR STACK DECLARATION * | |
115 ********************************** | |
116 */ | |
117 .section "timer_hisr_stack","aw",%nobits | |
118 .balign 4 | |
119 | |
120 INT_HISR_Stack_Mem: | |
121 | |
122 .space HISR_STACK_SIZE | |
123 | |
124 /* | |
125 ********************************** | |
126 * LOCAL VARIABLE DECLARATIONS * | |
127 ********************************** | |
128 */ | |
129 .text | |
130 | |
131 @ Define various data structure pointers so their addresses can be obtained | |
132 @ in a PC-relative manner. | |
133 | |
134 HISR_Stack_Ptr: | |
135 .word TMD_HISR_Stack_Ptr | |
136 | |
137 HISR_Stack_Size: | |
138 .word TMD_HISR_Stack_Size | |
139 | |
140 HISR_Priority: | |
141 .word TMD_HISR_Priority | |
142 | |
143 System_Stack: | |
144 .word TCD_System_Stack | |
145 | |
146 System_Limit: | |
147 .word TCT_System_Limit | |
148 | |
149 System_Stk_Limit: | |
150 .word INT_System_Stk_Limit | |
151 | |
152 System_Stack_SP: | |
153 .word INT_System_Stack_SP | |
154 | |
155 IRQ_Stack_SP: | |
156 .word INT_IRQ_Stack_SP | |
157 | |
158 FIQ_Stack_SP: | |
159 .word INT_FIQ_Stack_SP | |
160 | |
161 HISR_Stack_Mem: | |
162 .word INT_HISR_Stack_Mem | |
163 | |
164 First_Avail_Mem: | |
165 .word _xram_end /* ld script will define this */ | |
166 | |
167 /* | |
168 ************************************************************************ | |
169 * | |
170 * FUNCTION | |
171 * | |
172 * INT_Initialize | |
173 * | |
174 * DESCRIPTION | |
175 * | |
176 * This function sets up the global system stack variable and | |
177 * transfers control to the target independent initialization | |
178 * function INC_Initialize. Responsibilities of this function | |
179 * include the following: | |
180 * | |
181 * - Setup necessary processor/system control registers | |
182 * - Initialize the vector table | |
183 * - Setup the system stack pointers | |
184 * - Setup the timer interrupt | |
185 * - Calculate the timer HISR stack and priority | |
186 * - Calculate the first available memory address | |
187 * - Transfer control to INC_Initialize to initialize all of | |
188 * the system components. | |
189 * | |
190 * Major Revision: | |
191 * | |
192 * M. Kyle Craig, Accelerated Technology, Inc. | |
193 * | |
194 * | |
195 * | |
196 * | |
197 * CALLED BY | |
198 * | |
199 * Nothing. This function is the ENTRY point for Nucleus PLUS. | |
200 * | |
201 * CALLS | |
202 * | |
203 * INC_Initialize Common initialization | |
204 * | |
205 * INPUTS | |
206 * | |
207 * None | |
208 * | |
209 * OUTPUTS | |
210 * | |
211 * None | |
212 * | |
213 * HISTORY | |
214 * | |
215 * NAME DATE REMARKS | |
216 * | |
217 * W. Lamie 08-27-1994 Created initial version 1.0 | |
218 * D. Lamie 08-27-1994 Verified version 1.0 | |
219 * | |
220 ************************************************************************ | |
221 */ | |
222 | |
223 @VOID INT_Initialize(void) | |
224 @{ | |
225 | |
226 .globl INT_Initialize | |
227 INT_Initialize: | |
228 | |
229 @ Insure that the processor is in supervisor mode. | |
230 MRS r0,CPSR @ Pickup current CPSR | |
231 BIC r0,r0,#MODE_MASK @ Clear the mode bits | |
232 ORR r0,r0,#SUP_MODE @ Set the supervisor mode bits | |
233 ORR r0,r0,#LOCKOUT @ Insure IRQ/FIQ interrupts are | |
234 @ locked out | |
235 MSR CPSR,r0 @ Setup the new CPSR | |
236 | |
237 @ Initialize the system stack pointers. This is done after the BSS is | |
238 @ clear because the TCD_System_Stack pointer is a BSS variable! It is | |
239 @ assumed that available memory starts immediately after the end of the | |
240 @ BSS section. | |
241 | |
242 LDR r10,System_Stk_Limit @ Pickup the system stack limit (bottom of system stack) | |
243 LDR r3,System_Limit @ Pickup sys stack limit addr | |
244 STR r10,[r3, #0] @ Save stack limit | |
245 | |
246 LDR sp,System_Stack_SP @ Set-up the system stack pointer | |
247 LDR r3,System_Stack @ Pickup system stack address | |
248 STR sp,[r3, #0] @ Save stack pointer | |
249 | |
250 MRS r0,CPSR @ Pickup current CPSR | |
251 BIC r0,r0,#MODE_MASK @ Clear the mode bits | |
252 ORR r0,r0,#IRQ_MODE @ Set the IRQ mode bits | |
253 MSR CPSR,r0 @ Move to IRQ mode | |
254 | |
255 LDR sp,IRQ_Stack_SP @ Setup IRQ stack pointer | |
256 | |
257 MRS r0,CPSR @ Pickup current CPSR | |
258 BIC r0,r0,#MODE_MASK @ Clear the mode bits | |
259 ORR r0,r0,#FIQ_MODE @ Set the FIQ mode bits | |
260 MSR CPSR,r0 @ Move to the FIQ mode | |
261 | |
262 LDR sp,FIQ_Stack_SP @ Setup FIQ stack pointer | |
263 | |
264 MRS r0,CPSR @ Pickup current CPSR | |
265 BIC r0,r0,#MODE_MASK @ Clear mode bits | |
266 ORR r0,r0,#SUP_MODE @ Set the supervisor mode bits | |
267 MSR CPSR,r0 @ All interrupt stacks are setup, | |
268 @ return to supervisor mode | |
269 | |
270 @ Define the global data structures that need to be initialized by this | |
271 @ routine. These structures are used to define the system timer | |
272 @ management HISR. | |
273 @ TMD_HISR_Stack_Ptr = (VOID *) r2; | |
274 @ TMD_HISR_Stack_Size = TIMER_SIZE; | |
275 @ TMD_HISR_Priority = TIMER_PRIORITY; | |
276 | |
277 LDR r2,HISR_Stack_Mem @ Get HISR stack memory address | |
278 LDR r3,HISR_Stack_Ptr @ Pickup variable's address | |
279 STR r2,[r3, #0] @ Setup timer HISR stack pointer | |
280 MOV r1,#HISR_STACK_SIZE @ Pickup the timer HISR stack size | |
281 LDR r3,HISR_Stack_Size @ Pickup variable's address | |
282 STR r1,[r3, #0] @ Setup timer HISR stack size | |
283 MOV r1,#HISR_PRIORITY @ Pickup timer HISR priority (0-2) | |
284 LDR r3,HISR_Priority @ Pickup variable's address | |
285 STR r1,[r3, #0] @ Setup timer HISR priority | |
286 | |
287 @ Make a call to begin all board specific initialization. | |
288 @ Begin with Initializing the Vector table and replacing | |
289 @ default interrupts with Plus IRQs. Then setup the timer | |
290 @ and begin the system clock. | |
291 | |
292 @ FreeCalypso change: we are now using TI's code structure | |
293 @ which handles the interrupts and the timers differently. | |
294 | |
295 @ BL INT_Interrupt_Init @ Install the vector table | |
296 @ BL INT_Timer_Initialize @ Initialize the timer | |
297 | |
298 @ Call INC_Initialize with a pointer to the first available memory | |
299 @ address after the compiler's global data. This memory may be used | |
300 @ by the application. | |
301 @ INC_Initialize(first_available_memory); | |
302 | |
303 LDR r0,First_Avail_Mem @ Get address of first available memory | |
304 | |
305 B INC_Initialize @ to high-level initialization | |
306 @} |