FreeCalypso > hg > freecalypso-sw
comparison loadtools/scripts/dsample.config @ 995:c22afeecbf34
loadtools/scripts: D-Sample config added
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
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date | Sat, 02 Jan 2016 04:05:51 +0000 |
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994:63ea60e7fbbc | 995:c22afeecbf34 |
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1 # The following parameters go into the <p command sent to the boot ROM | |
2 # The values to be used have been gleaned from the 20020917 fw image | |
3 | |
4 # CLKTCXO input is 13 MHz on the D-Sample, and with Calypso C05 | |
5 # the max allowed PLL'ed clock is 78 MHz for the DSP and 39 MHz for the ARM. | |
6 # TI's firmware sets the PLL up to multiply by 6 (giving 78 MHz) with | |
7 # divide by 2 for the ARM, but the boot ROM doesn't do the latter when | |
8 # the input clock is 13 MHz. Hence we'll program the PLL to multiply | |
9 # by 3, putting everything at 39 MHz. | |
10 | |
11 pll-config 3/1 | |
12 rhea-cntl 0x00 # set by 20020917 fw, hence presumed correct | |
13 | |
14 # The remaining settings are carried out via loadagent commands | |
15 init-script cs2-4ws-8mb.init | |
16 | |
17 # 8 MiB flash, accessible at 0x03000000 without Compal-like problems, | |
18 # let's use CFI. | |
19 flash cfi-8M 0x03000000 | |
20 | |
21 # Perform a Iota poweroff when we are done | |
22 exit-mode iota-off |