FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/L1/audio_cfile/l1audio_stereo.c @ 606:c5286d24539e
gsm-fw/L1/audio_cfile: initial import from LoCosto source
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Fri, 29 Aug 2014 03:25:51 +0000 |
parents | |
children | 262fcce10859 |
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605:527956ce73c7 | 606:c5286d24539e |
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1 /* | |
2 * l1audio_stereo.c | |
3 * | |
4 * Control audio | |
5 * | |
6 * Filename l1audio_stereo.c | |
7 * Copyright 2003 (C) Texas Instruments | |
8 * | |
9 * | |
10 */ | |
11 | |
12 #include "l1_macro.h" | |
13 #include "l1_confg.h" | |
14 | |
15 #define _L1AUDIO_STEREO_C_ | |
16 | |
17 #if (AUDIO_TASK == 1) | |
18 | |
19 #include "l1_types.h" | |
20 #include "sys_types.h" | |
21 | |
22 #if (CODE_VERSION == SIMULATION) && (AUDIO_SIMULATION) | |
23 | |
24 | |
25 #include <stdlib.h> | |
26 #include <string.h> | |
27 | |
28 #include "iq.h" // Debug / Init hardware ("eva3.lib") | |
29 #include "l1_ver.h" | |
30 #include "l1_const.h" | |
31 #include "l1_signa.h" | |
32 | |
33 #if TESTMODE | |
34 #include "l1tm_defty.h" | |
35 #endif | |
36 | |
37 #include "l1audio_const.h" | |
38 #include "l1audio_cust.h" | |
39 #include "l1audio_signa.h" | |
40 #include "l1audio_defty.h" | |
41 #include "l1audio_msgty.h" | |
42 | |
43 #if (L1_GTT == 1) | |
44 #include "l1gtt_const.h" | |
45 #include "l1gtt_defty.h" | |
46 #endif | |
47 //added here from e-sample for AAC | |
48 #if (L1_DYN_DSP_DWNLD == 1) | |
49 #include "l1_dyn_dwl_const.h" | |
50 #include "l1_dyn_dwl_defty.h" | |
51 #endif | |
52 #if (L1_MP3 == 1) | |
53 #include "l1mp3_defty.h" | |
54 #endif | |
55 | |
56 #if (L1_MIDI == 1) | |
57 #include "l1midi_defty.h" | |
58 #endif | |
59 //added here from e-sample for AAC | |
60 #if (L1_AAC == 1) | |
61 #include "l1aac_defty.h" | |
62 #endif | |
63 | |
64 #include "l1_defty.h" | |
65 #include "cust_os.h" | |
66 #include "l1_msgty.h" | |
67 #include "l1_varex.h" | |
68 | |
69 #include "l1_mftab.h" | |
70 #include "l1_tabs.h" | |
71 #include "l1_ctl.h" | |
72 | |
73 #include "l1_time.h" | |
74 #include "l1_scen.h" | |
75 | |
76 #if (L1_STEREOPATH == 1) | |
77 #include "sys_dma.h" | |
78 #include "sys_inth.h" | |
79 #include "abb.h" | |
80 #if TESTMODE | |
81 #include "l1tm_msgty.h" | |
82 #endif | |
83 #include "l1audio_stereo.h" | |
84 #endif | |
85 | |
86 #else | |
87 // Layer1 and debug include files. | |
88 | |
89 #include <ctype.h> | |
90 #include <math.h> | |
91 #include "l1_ver.h" | |
92 #include "l1_const.h" | |
93 #include "l1_signa.h" | |
94 | |
95 #if TESTMODE | |
96 #include "l1tm_defty.h" | |
97 #endif | |
98 | |
99 #include "l1audio_const.h" | |
100 #include "l1audio_cust.h" | |
101 #include "l1audio_signa.h" | |
102 #include "l1audio_defty.h" | |
103 #include "l1audio_msgty.h" | |
104 | |
105 #if (L1_GTT == 1) | |
106 #include "l1gtt_const.h" | |
107 #include "l1gtt_defty.h" | |
108 #endif | |
109 //added here from e-sample for AAC | |
110 #if (L1_DYN_DSP_DWNLD == 1) | |
111 #include "l1_dyn_dwl_const.h" | |
112 #include "l1_dyn_dwl_defty.h" | |
113 #endif | |
114 #if (L1_MP3 == 1) | |
115 #include "l1mp3_defty.h" | |
116 #endif | |
117 | |
118 #if (L1_MIDI == 1) | |
119 #include "l1midi_defty.h" | |
120 #endif | |
121 //added here from e-sample for AAC | |
122 #if (L1_AAC == 1) | |
123 #include "l1aac_defty.h" | |
124 #endif | |
125 #include "l1_defty.h" | |
126 #include "cust_os.h" | |
127 #include "l1_msgty.h" | |
128 #include "tpudrv.h" // TPU drivers. ("eva3.lib") | |
129 #include "l1_varex.h" | |
130 | |
131 #include "l1_proto.h" | |
132 #include "l1_mftab.h" | |
133 #include "l1_tabs.h" | |
134 #include "mem.h" | |
135 #include "armio.h" | |
136 #include "timer.h" | |
137 #include "timer1.h" | |
138 #include "dma.h" | |
139 #include "inth.h" | |
140 #include "ulpd.h" | |
141 #include "rhea_arm.h" | |
142 #include "clkm.h" // Clockm ("eva3.lib") | |
143 #include "l1_ctl.h" | |
144 | |
145 #include "l1_time.h" | |
146 #if L2_L3_SIMUL | |
147 #include "l1_scen.h" | |
148 #endif | |
149 | |
150 #if (L1_STEREOPATH == 1) | |
151 #include "sys_dma.h" | |
152 #include "sys_inth.h" | |
153 #include "abb.h" | |
154 #if TESTMODE | |
155 #include "l1tm_msgty.h" | |
156 #endif | |
157 #include "l1audio_stereo.h" | |
158 #endif | |
159 | |
160 #include "l1audio_abb.h" | |
161 #endif | |
162 | |
163 #include "l1audio_macro.h" | |
164 | |
165 //add the extern reference of abb_write_done | |
166 #if (ANLG_FAM == 11) | |
167 #include "bspTwl3029_I2c.h" | |
168 #include "bspTwl3029_Aud_Map.h" | |
169 #endif | |
170 | |
171 #if (ANLG_FAM == 11) | |
172 Bsp_Twl3029_I2cTransReqArray l1audio_i2cTransArray; | |
173 #endif | |
174 | |
175 #if (L1_STEREOPATH == 1) && (CODE_VERSION == NOT_SIMULATION) | |
176 | |
177 #if (ANLG_FAM == 11) | |
178 #include "bspTwl3029_Int_Map.h" | |
179 | |
180 | |
181 //Add the call back function of the stereo path. | |
182 void l1s_stereopath_callback(UWORD8 cbvalue) | |
183 { | |
184 BspTwl3029_ReturnCode returnVal = BSP_TWL3029_RETURN_CODE_FAILURE; | |
185 UWORD16 count = 0; | |
186 UINT8 triton_classD = 0; | |
187 | |
188 /* callback function info pointer */ | |
189 BspTwl3029_I2C_Callback i2c_callback; | |
190 BspTwl3029_I2C_CallbackPtr callbackPtr= &i2c_callback; | |
191 | |
192 /* I2C array */ | |
193 Bsp_Twl3029_I2cTransReqArray i2cTransArray; | |
194 Bsp_Twl3029_I2cTransReqArrayPtr i2cTransArrayPtr= &i2cTransArray; | |
195 | |
196 /* twl3029 I2C reg info struct */ | |
197 BspTwl3029_I2C_RegisterInfo regInfo[10] ; | |
198 BspTwl3029_I2C_RegisterInfo* regInfoPtr = regInfo; | |
199 | |
200 BspTwl3029_I2C_RegData tmpAudioHFTest1RegData=0; | |
201 BspTwl3029_I2C_RegData tmpCtrl3RegData=0; | |
202 | |
203 bspTwl3029_Audio_getClassD_mode(&triton_classD); | |
204 | |
205 //Set the valud of abb_write_done to 1 | |
206 l1s.abb_write_done = 1; | |
207 switch(cbvalue) | |
208 { | |
209 case L1S_TWL3029_STEROPATH_START: | |
210 { | |
211 l1a_l1s_com.outen_cfg_task.command_commited = l1a_l1s_com.outen_cfg_task.command_requested; | |
212 | |
213 returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_CTRL3_OFFSET, | |
214 &tmpCtrl3RegData); | |
215 returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_HFTEST1_OFFSET, | |
216 &tmpAudioHFTest1RegData); | |
217 | |
218 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET, | |
219 l1a_l1s_com.outen_cfg_task.outen1, regInfoPtr++); | |
220 count++; | |
221 | |
222 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET, | |
223 l1a_l1s_com.outen_cfg_task.outen2, regInfoPtr++); | |
224 count++; | |
225 | |
226 if(l1a_l1s_com.outen_cfg_task.classD == 0x01) // User wants to configure classD | |
227 { | |
228 if(triton_classD == 0x00) // User wants to switch on and Triton not configured for classD | |
229 { | |
230 returnVal= BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_CKG_TESTUNLOCK_OFFSET, | |
231 0xb6, regInfoPtr++); | |
232 count++; | |
233 | |
234 returnVal= BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET, | |
235 l1a_l1s_com.outen_cfg_task.outen3, regInfoPtr++); | |
236 count++; | |
237 | |
238 tmpCtrl3RegData |= 0x80; // AUDIO_CTRL3_SPKDIGON | |
239 tmpAudioHFTest1RegData = 0x01; // AUDIO_HFTEST1_SPKALLZB | |
240 | |
241 BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_CTRL3_OFFSET, | |
242 tmpCtrl3RegData, regInfoPtr++); | |
243 count++; | |
244 | |
245 BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_HFTEST1_OFFSET, | |
246 tmpAudioHFTest1RegData, regInfoPtr++); | |
247 count++; | |
248 } | |
249 } | |
250 else if(l1a_l1s_com.outen_cfg_task.classD == 0x00) | |
251 { | |
252 if(triton_classD != 0x00) // User wants no to classD and Triton configured for classD | |
253 { | |
254 tmpCtrl3RegData &= 0x7F; // AUDIO_CTRL3_SPKDIGON | |
255 tmpAudioHFTest1RegData = 0x00; // AUDIO_HFTEST1_SPKALLZB | |
256 | |
257 BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_HFTEST1_OFFSET, | |
258 tmpAudioHFTest1RegData, regInfoPtr++); | |
259 count++; | |
260 | |
261 BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_CTRL3_OFFSET, | |
262 tmpCtrl3RegData, regInfoPtr++); | |
263 count++; | |
264 | |
265 returnVal= BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET, | |
266 l1a_l1s_com.outen_cfg_task.outen3, regInfoPtr++); | |
267 count++; | |
268 | |
269 BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_CKG_TESTUNLOCK_OFFSET, | |
270 0x00, regInfoPtr++); | |
271 count++; | |
272 } | |
273 else // User no classD & Triton also no classD | |
274 { | |
275 returnVal= BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET, | |
276 l1a_l1s_com.outen_cfg_task.outen3, regInfoPtr++); | |
277 count++; | |
278 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET, | |
279 l1a_l1s_com.outen_cfg_task.outen2, regInfoPtr++); | |
280 count++; | |
281 returnVal= BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET, | |
282 l1a_l1s_com.outen_cfg_task.outen3, regInfoPtr++); | |
283 count++; | |
284 } | |
285 } | |
286 /*Switch OFF all pop modes unconditionally , it is turned on before turning on STON*/ | |
287 returnVal=BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_POPMAN_OFFSET, 0x00,regInfoPtr++); | |
288 count++; | |
289 | |
290 callbackPtr->callbackFunc = l1s_stereopath_callback; | |
291 callbackPtr->callbackVal = L1S_TWL3029_STEROPATH_OUTEN_CONFIG; | |
292 | |
293 if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE) | |
294 { | |
295 regInfoPtr = regInfo; | |
296 /* now request to I2C manager to write to Triton registers */ | |
297 | |
298 returnVal = BspTwl3029_I2c_regInfoSend(regInfo,count,callbackPtr, | |
299 (BspI2c_TransactionRequest*)i2cTransArrayPtr); | |
300 } | |
301 break; | |
302 } | |
303 case L1S_TWL3029_STEROPATH_CONFIG: | |
304 case L1S_TWL3029_STEROPATH_OUTEN_CONFIG: | |
305 case L1S_TWL3029_STEROPATH_STOP: | |
306 break; | |
307 default: | |
308 break; | |
309 }/* end switch */ | |
310 } /* end function l1s_stereopath_callback */ | |
311 | |
312 #endif | |
313 | |
314 /*-------------------------------------------------------*/ | |
315 /* l1s_stereopath_drv_config_ABB() */ | |
316 /*-------------------------------------------------------*/ | |
317 /* */ | |
318 /* Parameters : mono_stereo: indicates if buffer is made */ | |
319 /* of mono or stereo samples */ | |
320 /* sampling_frequency: sampling freq */ | |
321 /* */ | |
322 /* Return : none */ | |
323 /* */ | |
324 /* Description : ABB configuration function */ | |
325 /* */ | |
326 /*-------------------------------------------------------*/ | |
327 void l1s_stereopath_drv_config_ABB(UWORD8 mono_stereo,UWORD8 sampling_frequency) | |
328 { | |
329 #if (ANLG_FAM == 3) | |
330 UWORD16 regist; | |
331 | |
332 // Get the VAUDCTRL register | |
333 regist = l1s_dsp_com.dsp_ndb_ptr->d_vaud_cfg >> 6; | |
334 | |
335 // reset sampling frequency and stereo/mono conversion | |
336 regist &= 0x319; | |
337 | |
338 // stereo/mono conversion ? | |
339 if (mono_stereo == AUDIO_SP_MONO_OUTPUT) | |
340 regist |= 6; | |
341 | |
342 // apply the request sampling frequency | |
343 regist |= (sampling_frequency << 5); | |
344 | |
345 // update DSP API | |
346 l1s_dsp_com.dsp_ndb_ptr->d_vaud_cfg = ABB_L1_WRITE(VAUDCTRL, regist); | |
347 | |
348 // Get the VBCTRL2 register | |
349 regist = l1s_dsp_com.dsp_ndb_ptr->d_vbctrl2 >> 6; | |
350 // activate HSOVMID and VMIDFBYP | |
351 regist |= 0x90; | |
352 l1s_dsp_com.dsp_ndb_ptr->d_vbctrl2 = ABB_L1_WRITE(VBCTRL2, regist); | |
353 | |
354 // Get the VAUDPLL register | |
355 regist = l1s_dsp_com.dsp_ndb_ptr->d_vaud_pll >> 6; | |
356 // reset PLL | |
357 regist &= 0x3fd; | |
358 // switch PLL on | |
359 regist |= 0x2; | |
360 | |
361 // update DSP API | |
362 l1s_dsp_com.dsp_ndb_ptr->d_vaud_pll = ABB_L1_WRITE(VAUDPLL, regist); | |
363 | |
364 // Get the VBPOP register | |
365 regist = l1s_dsp_com.dsp_ndb_ptr->d_vbpop >> 6; | |
366 // deactivate vbpop for HSO | |
367 regist &= 0x3F8; | |
368 | |
369 // update DSP API | |
370 l1s_dsp_com.dsp_ndb_ptr->d_vbpop = ABB_L1_WRITE(VBPOP, regist); | |
371 | |
372 #endif | |
373 | |
374 #if (ANLG_FAM == 11) | |
375 // Call to the Triton API which would configure the Audio path. | |
376 UWORD8 monostereo; | |
377 UWORD8 pll; | |
378 //Call back function | |
379 BspTwl3029_I2C_Callback stereo_callbackFunc; | |
380 | |
381 //Switch on the Stereo path PLL - Set the STPLLON to 1 | |
382 pll = 0x02; | |
383 //Check if stereo2mono is required | |
384 if (mono_stereo == AUDIO_SP_MONO_OUTPUT) | |
385 monostereo = 0x03; | |
386 else | |
387 monostereo = 0x00; | |
388 | |
389 //Set the call back function to be called after the Audio configuration | |
390 stereo_callbackFunc.callbackFunc = l1s_stereopath_callback ; | |
391 //stereo_callbackFunc.callbackVal = L1S_TWL3029_STEROPATH_CONFIG; | |
392 stereo_callbackFunc.callbackVal = L1S_TWL3029_STEROPATH_START; | |
393 stereo_callbackFunc.i2cTransArrayPtr = &l1audio_i2cTransArray; | |
394 | |
395 //Call the Triton audio path configuration function | |
396 if(BSP_TWL3029_RETURN_CODE_SUCCESS == bspTwl3029_Audio_Configure_Stereopath(&stereo_callbackFunc, | |
397 pll, | |
398 monostereo, | |
399 sampling_frequency )) | |
400 { | |
401 //Set the valud of abb_write_done to 1 | |
402 l1s.abb_write_done = 1; | |
403 } | |
404 | |
405 #endif | |
406 } | |
407 | |
408 | |
409 /*-------------------------------------------------------*/ | |
410 /* l1s_stereopath_drv_start_ABB() */ | |
411 /*-------------------------------------------------------*/ | |
412 /* */ | |
413 /* Parameters : none */ | |
414 /* */ | |
415 /* Return : none */ | |
416 /* */ | |
417 /* Description : ABB start function */ | |
418 /* */ | |
419 /*-------------------------------------------------------*/ | |
420 void l1s_stereopath_drv_start_ABB(void) | |
421 { | |
422 #if (ANLG_FAM == 3) | |
423 // Get VAUDPLL register | |
424 UWORD16 regist = l1s_dsp_com.dsp_ndb_ptr->d_vaud_pll >> 6; | |
425 | |
426 // Reset I2S | |
427 regist &= 0x2ff; | |
428 // I2S on | |
429 regist |= 0x100; | |
430 | |
431 // update DSP API | |
432 l1s_dsp_com.dsp_ndb_ptr->d_vaud_pll = ABB_L1_WRITE(VAUDPLL, regist); | |
433 | |
434 // Set AUDON bit of the PWRDNRG register | |
435 regist = 0x100; | |
436 // update DSP API | |
437 l1s_dsp_com.dsp_ndb_ptr->d_togbr2 = ABB_L1_WRITE(TOGBR2, regist); | |
438 #endif | |
439 #if (ANLG_FAM == 11) | |
440 //Call back function | |
441 BspTwl3029_I2C_Callback stereo_callbackFunc; | |
442 //Set the call back function to be called after the Audio start | |
443 stereo_callbackFunc.callbackFunc = l1s_stereopath_callback ; | |
444 stereo_callbackFunc.callbackVal = L1S_TWL3029_STEROPATH_CONFIG; | |
445 stereo_callbackFunc.i2cTransArrayPtr = &l1audio_i2cTransArray; | |
446 | |
447 //call the Triton audio path start function | |
448 if (BSP_TWL3029_RETURN_CODE_SUCCESS == bspTwl3029_Audio_Start_Stereopath(&stereo_callbackFunc)) | |
449 { | |
450 l1s.abb_write_done = 1; | |
451 }; | |
452 #endif | |
453 | |
454 } | |
455 | |
456 /*-------------------------------------------------------*/ | |
457 /* l1s_stereopath_drv_stop_ABB() */ | |
458 /*-------------------------------------------------------*/ | |
459 /* */ | |
460 /* Parameters : none */ | |
461 /* */ | |
462 /* Return : none */ | |
463 /* */ | |
464 /* Description : ABB stop function */ | |
465 /* */ | |
466 /*-------------------------------------------------------*/ | |
467 void l1s_stereopath_drv_stop_ABB(void) | |
468 { | |
469 #if (ANLG_FAM == 3) | |
470 UWORD16 regist; | |
471 | |
472 // Reset AUDON bit of the PWRDNRG register | |
473 regist = 0x80; | |
474 // update DSP API | |
475 l1s_dsp_com.dsp_ndb_ptr->d_togbr2 = ABB_L1_WRITE(TOGBR2, regist); | |
476 | |
477 // Get VAUDPLL register | |
478 regist = l1s_dsp_com.dsp_ndb_ptr->d_vaud_pll >> 6; | |
479 // PLL/I2S off | |
480 regist &= 0x2fd; | |
481 ABB_Write_Register_on_page(PAGE1, VAUDPLL, regist); | |
482 // update DSP API | |
483 l1s_dsp_com.dsp_ndb_ptr->d_vaud_pll = ABB_L1_WRITE(VAUDPLL, regist); | |
484 #endif | |
485 #if (ANLG_FAM == 11) | |
486 //Call back function | |
487 BspTwl3029_I2C_Callback stereo_callbackFunc; | |
488 | |
489 UWORD8 dl_control = 1; // OUTEN_DISABLE | |
490 | |
491 // Set the call back function to be called after the Audio start | |
492 stereo_callbackFunc.callbackFunc = l1s_stereopath_callback ; | |
493 stereo_callbackFunc.callbackVal = L1S_TWL3029_STEROPATH_STOP; | |
494 stereo_callbackFunc.i2cTransArrayPtr = &l1audio_i2cTransArray; | |
495 | |
496 if( (l1s.audio_state[L1S_AUDIO_DL_ONOFF_STATE] == L1_AUDIO_DL_ON) || | |
497 (l1s.audio_state[L1S_AUDIO_DL_ONOFF_STATE] == L1_AUDIO_DL_SWITCHON_STARTED)) | |
498 { | |
499 dl_control = 0; // OUTEN_ENABLE | |
500 } | |
501 | |
502 //call the Triton audio path start function | |
503 if (BSP_TWL3029_RETURN_CODE_SUCCESS == bspTwl3029_Audio_Stop_Stereopath(&stereo_callbackFunc, dl_control)) | |
504 { | |
505 l1s.abb_write_done = 1; | |
506 }; | |
507 #endif | |
508 } | |
509 | |
510 | |
511 /*-------------------------------------------------------*/ | |
512 /* l1s_stereopath_drv_start_DMA() */ | |
513 /*-------------------------------------------------------*/ | |
514 /* */ | |
515 /* Parameters : d_dma_channel_parameter: DMA parameters */ | |
516 /* DMA_allocation: allocation of the DMA */ | |
517 /* (MCU/DSP) */ | |
518 /* */ | |
519 /* Return : none */ | |
520 /* */ | |
521 /* Description : DMA config and start function */ | |
522 /* */ | |
523 /*-------------------------------------------------------*/ | |
524 void l1s_stereopath_drv_start_DMA(T_DMA_TYPE_CHANNEL_PARAMETER d_dma_channel_parameter,UWORD8 DMA_allocation) | |
525 { | |
526 #if ((CHIPSET == 12) || (CHIPSET == 15)) | |
527 #if (L1_MP3_SIX_BUFFER == 1) | |
528 // allocate the DMA to the MCU | |
529 f_dma_channel_allocation_set(d_dma_channel_parameter.d_dma_channel_number, C_DMA_CHANNEL_ARM); | |
530 | |
531 // set parameters | |
532 f_dma_channel_parameter_set((T_DMA_TYPE_CHANNEL_PARAMETER *)&d_dma_channel_parameter); | |
533 #else | |
534 // set parameters | |
535 f_dma_channel_parameter_set((T_DMA_TYPE_CHANNEL_PARAMETER *)&d_dma_channel_parameter); | |
536 | |
537 // allocate the DMA to the MCU | |
538 f_dma_channel_allocation_set(d_dma_channel_parameter.d_dma_channel_number, C_DMA_CHANNEL_ARM); | |
539 | |
540 #endif | |
541 // Enable the DMA channel | |
542 f_dma_channel_enable(d_dma_channel_parameter.d_dma_channel_number); | |
543 | |
544 | |
545 // DMA allocation ? | |
546 if (DMA_allocation == AUDIO_SP_DMA_ALLOC_MCU) | |
547 { | |
548 // DMA is allocate to MCU, just unmask DMA IT | |
549 F_INTH_ENABLE_ONE_IT(C_INTH_DMA_IT); | |
550 } | |
551 else | |
552 { | |
553 // DMA is allocate to DSP, unmask API IT | |
554 F_INTH_ENABLE_ONE_IT(C_INTH_API_IT); | |
555 | |
556 // Re-allocate DMA to the DSP | |
557 f_dma_channel_allocation_set(d_dma_channel_parameter.d_dma_channel_number, C_DMA_CHANNEL_DSP); | |
558 } | |
559 #endif | |
560 } | |
561 | |
562 /*-------------------------------------------------------*/ | |
563 /* l1s_stereopath_drv_reset_DMA() */ | |
564 /*-------------------------------------------------------*/ | |
565 /* */ | |
566 /* Parameters : d_dma_channel_parameter: DMA parameters */ | |
567 /* */ | |
568 /* Return : none */ | |
569 /* */ | |
570 /* Description : DMA reset function */ | |
571 /* */ | |
572 /*-------------------------------------------------------*/ | |
573 void l1s_stereopath_drv_reset_DMA(T_DMA_TYPE_CHANNEL_PARAMETER d_dma_channel_parameter) | |
574 { | |
575 #if ((CHIPSET == 12) || (CHIPSET == 15)) | |
576 // Allocate DMA to MCU | |
577 f_dma_channel_allocation_set(d_dma_channel_parameter.d_dma_channel_number, C_DMA_CHANNEL_ARM); | |
578 | |
579 // Disable DMA channel | |
580 f_dma_channel_disable(d_dma_channel_parameter.d_dma_channel_number); | |
581 | |
582 // Reset DMA channel | |
583 f_dma_channel_soft_reset(d_dma_channel_parameter.d_dma_channel_number); | |
584 #endif | |
585 } | |
586 | |
587 | |
588 /*-------------------------------------------------------*/ | |
589 /* l1s_stereopath_drv_reset_CPORT() */ | |
590 /*-------------------------------------------------------*/ | |
591 /* */ | |
592 /* Parameters : none */ | |
593 /* */ | |
594 /* Return : none */ | |
595 /* */ | |
596 /* Description : Cport reset function */ | |
597 /* */ | |
598 /*-------------------------------------------------------*/ | |
599 void l1s_stereopath_drv_reset_CPORT(void) | |
600 { | |
601 #if ((CHIPSET == 12) || (CHIPSET == 15)) | |
602 // init = 1 --> write ctrl register | |
603 l1s_dsp_com.dsp_ndb_ptr->d_cport_init = (API) 0x0001; | |
604 // set SW_RESET field to 1 to generate a software reset | |
605 l1s_dsp_com.dsp_ndb_ptr->d_cport_ctrl = (API) 0x0FFD; | |
606 #endif | |
607 } | |
608 | |
609 /*-------------------------------------------------------*/ | |
610 /* l1s_stereopath_drv_stop_CPORT() */ | |
611 /*-------------------------------------------------------*/ | |
612 /* */ | |
613 /* Parameters : none */ | |
614 /* */ | |
615 /* Return : none */ | |
616 /* */ | |
617 /* Description : Cport stop function */ | |
618 /* */ | |
619 /*-------------------------------------------------------*/ | |
620 void l1s_stereopath_drv_stop_CPORT(void) | |
621 { | |
622 #if (CHIPSET == 12) || (CHIPSET == 15) | |
623 // init = 1 --> write ctrl register | |
624 l1s_dsp_com.dsp_ndb_ptr->d_cport_init = (API) 0x0001; | |
625 // Set EXT_MCLK_EN field to 1 to enable external clock | |
626 l1s_dsp_com.dsp_ndb_ptr->d_cport_ctrl = (API) 0x0000; | |
627 #endif | |
628 } | |
629 | |
630 | |
631 /*-------------------------------------------------------*/ | |
632 /* l1s_stereopath_drv_config_CPORT() */ | |
633 /*-------------------------------------------------------*/ | |
634 /* */ | |
635 /* Parameters : none */ | |
636 /* */ | |
637 /* Return : none */ | |
638 /* */ | |
639 /* Description : Cport config function */ | |
640 /* */ | |
641 /*-------------------------------------------------------*/ | |
642 void l1s_stereopath_drv_config_CPORT(void) | |
643 { | |
644 #if (CHIPSET == 12) || (CHIPSET == 15) | |
645 // init = 0x281F --> write cfr1,2,3,4 and ctrl register | |
646 l1s_dsp_com.dsp_ndb_ptr->d_cport_init = (API) 0x281F; | |
647 // 2 timeslots per frame, I2S mode | |
648 // 20 CLK_BIT cycles, 16 data bits per time slot | |
649 l1s_dsp_com.dsp_ndb_ptr->a_cport_cfr[0] = (API) 0x0C0B; | |
650 // one cycle delay, enable data serial output | |
651 // CSYNC signal generate with the negative edge of CSCLK | |
652 // clk direction set to input | |
653 // l1s_dsp_com.dsp_ndb_ptr->a_cport_cfr[1] = (API) 0xEB00; | |
654 l1s_dsp_com.dsp_ndb_ptr->a_cport_cfr[1] = (API) 0xFB00; // L1_DSP-SPR-18866 | |
655 // mask receive/transmit interrupt request | |
656 // Set threshold to 2 (nb of elements = 2) | |
657 l1s_dsp_com.dsp_ndb_ptr->d_cport_ctrl = (API) 0x012C; | |
658 #endif | |
659 } | |
660 | |
661 | |
662 /*-------------------------------------------------------*/ | |
663 /* l1s_stereopath_drv_start_CPORT() */ | |
664 /*-------------------------------------------------------*/ | |
665 /* */ | |
666 /* Parameters : none */ | |
667 /* */ | |
668 /* Return : none */ | |
669 /* */ | |
670 /* Description : Cport start function */ | |
671 /* */ | |
672 /*-------------------------------------------------------*/ | |
673 void l1s_stereopath_drv_start_CPORT(void) | |
674 { | |
675 #if (CHIPSET == 12) || (CHIPSET == 15) | |
676 // init = 0x20 --> write tcl_tadt register | |
677 l1s_dsp_com.dsp_ndb_ptr->d_cport_init = (API) 0x0020; | |
678 // CPEN = 1 --> cport enable | |
679 l1s_dsp_com.dsp_ndb_ptr->d_cport_tcl_tadt = (API) 0x0800; | |
680 #endif | |
681 } | |
682 | |
683 #endif // L1_STEREOPATH && CODE_VERSION | |
684 | |
685 #endif // AUDIO_TASK |