FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/bsp/abb+spi/spi_task.c @ 157:e48ea5875df7
gsm-fw: SPI task code compiles and links
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Sun, 17 Nov 2013 09:17:06 +0000 |
parents | 63750f70796d |
children | 54459b912ef0 |
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156:eba29cb0526c | 157:e48ea5875df7 |
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1 /*****************************************************************************/ | 1 /*****************************************************************************/ |
2 /* */ | 2 /* */ |
3 /* Name spi_task.c */ | 3 /* Name spi_task.c */ |
4 /* */ | 4 /* */ |
5 /* Function this file contains the main SPI function: spi_core. */ | 5 /* Function this file contains the main SPI function: spi_core. */ |
6 /* It contains the body of the SPI task. */ | 6 /* It contains the body of the SPI task. */ |
7 /* It will initialize the SPI and then wait for messages */ | 7 /* It will initialize the SPI and then wait for messages */ |
8 /* or functions calls. */ | 8 /* or functions calls. */ |
9 /* */ | 9 /* */ |
10 /* Version 0.1 */ | 10 /* Version 0.1 */ |
11 /* Author Candice Bazanegue */ | 11 /* Author Candice Bazanegue */ |
12 /* */ | 12 /* */ |
13 /* Date Modification */ | 13 /* Date Modification */ |
14 /* ------------------------------------ */ | 14 /* ------------------------------------ */ |
15 /* 20/08/2000 Create */ | 15 /* 20/08/2000 Create */ |
16 /* 01/09/2003 Modfication */ | 16 /* 01/09/2003 Modfication */ |
17 /* Author Pascal Puel */ | 17 /* Author Pascal Puel */ |
18 /* */ | 18 /* */ |
19 /* (C) Copyright 2000 by Texas Instruments Incorporated, All Rights Reserved */ | 19 /* (C) Copyright 2000 by Texas Instruments Incorporated, All Rights Reserved */ |
20 /*****************************************************************************/ | 20 /*****************************************************************************/ |
21 | 21 |
22 #ifndef _WINDOWS | 22 #include "../iq.h" |
23 #include "chipset.cfg" | 23 |
24 #if (CHIPSET == 12) | 24 #if 0 // FreeCalypso |
25 #include "inth/sys_inth.h" | |
26 #else | |
27 #include "inth/iq.h" // for IQ_Unmask() | |
28 #endif | |
29 #include "power/power.h" // for Switch_ON() | 25 #include "power/power.h" // for Switch_ON() |
30 #endif | 26 #endif |
31 | 27 |
32 #include "rv/rv_defined_swe.h" // for RVM_PWR_SWE | 28 #include "../../riviera/rv/rv_defined_swe.h" // for RVM_PWR_SWE |
33 #include "rvm/rvm_use_id_list.h" | 29 #include "../../riviera/rvm/rvm_use_id_list.h" |
34 #include "spi/spi_env.h" | 30 #include "spi_env.h" |
35 #include "spi/spi_process.h" | 31 #include "spi_process.h" |
36 #include "spi/spi_task.h" | 32 #include "spi_task.h" |
37 | 33 |
38 #ifdef RVM_PWR_SWE | 34 #ifdef RVM_PWR_SWE |
39 #include "pwr/pwr_liion_cha.h" | 35 #include "pwr/pwr_liion_cha.h" |
40 #include "pwr/pwr_disch.h" | 36 #include "pwr/pwr_disch.h" |
41 #include "pwr/pwr_process.h" | 37 #include "pwr/pwr_process.h" |
51 ** waits for messages. | 47 ** waits for messages. |
52 ** | 48 ** |
53 *******************************************************************************/ | 49 *******************************************************************************/ |
54 T_RV_RET spi_core(void) | 50 T_RV_RET spi_core(void) |
55 { | 51 { |
56 BOOLEAN error_occured = FALSE; | 52 BOOLEAN error_occured = FALSE; |
57 T_RV_HDR * msg_ptr; | 53 T_RV_HDR * msg_ptr; |
58 | 54 |
59 rvf_send_trace("SPI_task: Initialization", 24, NULL_PARAM, RV_TRACE_LEVEL_DEBUG_LOW, SPI_USE_ID); | 55 rvf_send_trace("SPI_task: Initialization", 24, NULL_PARAM, |
56 RV_TRACE_LEVEL_DEBUG_LOW, SPI_USE_ID); | |
60 SPI_GBL_INFO_PTR->SpiTaskReady = TRUE; | 57 SPI_GBL_INFO_PTR->SpiTaskReady = TRUE; |
61 | 58 |
62 #ifndef _WINDOWS | 59 #if 0 // FreeCalypso: deferring until L1 integration |
63 /* Unmask External Interrupt once the SPI task is started */ | 60 /* Unmask External Interrupt once the SPI task is started */ |
64 #if (CHIPSET == 12) | 61 #if (CHIPSET == 12) |
65 // Unmask ABB ext interrupt | 62 // Unmask ABB ext interrupt |
66 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); | 63 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); |
67 #else | 64 #else |
68 // Unmask external (ABB) interrupt | 65 // Unmask external (ABB) interrupt |
69 IQ_Unmask(IQ_EXT); | 66 IQ_Unmask(IQ_EXT); |
70 #endif | 67 #endif |
71 // Get the switch on cause from ABB. | 68 // Get the switch on cause from ABB. |
72 Set_Switch_ON_Cause(); | 69 Set_Switch_ON_Cause(); |
73 #endif | 70 #endif |
74 | 71 |
75 /* loop to process messages */ | 72 /* loop to process messages */ |
76 while (error_occured == FALSE) | 73 while (error_occured == FALSE) |
74 { | |
75 /* Wait for the necessary events (infinite wait for a msg in the mailbox 0). */ | |
76 UINT16 received_event = rvf_wait (0xffff, 0); | |
77 | |
78 /* If an event related to mailbox 0 is received, then */ | |
79 if (received_event & RVF_TASK_MBOX_0_EVT_MASK) | |
77 { | 80 { |
78 /* Wait for the necessary events (infinite wait for a msg in the mailbox 0). */ | 81 /* Read the message in the driver mailbox and delegate action..*/ |
79 UINT16 received_event = rvf_wait (0xffff, 0); | 82 msg_ptr = (T_RV_HDR *) rvf_read_mbox(SPI_MAILBOX); |
80 | |
81 /* If an event related to mailbox 0 is received, then */ | |
82 if (received_event & RVF_TASK_MBOX_0_EVT_MASK) | |
83 { | |
84 /* Read the message in the driver mailbox and delegate action..*/ | |
85 msg_ptr = (T_RV_HDR *) rvf_read_mbox(SPI_MAILBOX); | |
86 | 83 |
87 #ifdef RVM_PWR_SWE | 84 #ifdef RVM_PWR_SWE |
88 if(spi_process(msg_ptr)) | 85 if(spi_process(msg_ptr)) |
89 { | 86 { |
90 pwr_process(msg_ptr); | 87 pwr_process(msg_ptr); |
91 } | 88 } |
92 #else | 89 #else |
93 spi_process(msg_ptr); | 90 spi_process(msg_ptr); |
94 #endif | 91 #endif |
95 } | 92 } |
96 | 93 |
97 #ifdef RVM_PWR_SWE | 94 #ifdef RVM_PWR_SWE |
98 /* Timers */ | 95 /* Timers */ |
99 if (received_event & SPI_TIMER0_WAIT_EVENT) | 96 if (received_event & SPI_TIMER0_WAIT_EVENT) |
100 { | 97 { |
101 pwr_bat_test_timer_process(); | 98 pwr_bat_test_timer_process(); |
102 } | 99 } |
103 | 100 |
104 if (received_event & SPI_TIMER1_WAIT_EVENT) | 101 if (received_event & SPI_TIMER1_WAIT_EVENT) |
105 /* timer used to detect the end of the CI charge */ | 102 /* timer used to detect the end of the CI charge */ |
106 { | 103 { |
107 pwr_CI_charge_timer_process(); | 104 pwr_CI_charge_timer_process(); |
108 } | 105 } |
109 | 106 |
110 if (received_event & SPI_TIMER2_WAIT_EVENT) | 107 if (received_event & SPI_TIMER2_WAIT_EVENT) |
111 /* timer used to detect the end of the CV charge */ | 108 /* timer used to detect the end of the CV charge */ |
112 { | 109 { |
113 pwr_CV_charge_timer_process(); | 110 pwr_CV_charge_timer_process(); |
114 } | 111 } |
115 | 112 |
116 if (received_event & SPI_TIMER3_WAIT_EVENT) | 113 if (received_event & SPI_TIMER3_WAIT_EVENT) |
117 /* timer used to check the battery discharge level */ | 114 /* timer used to check the battery discharge level */ |
118 { | 115 { |
119 pwr_discharge_timer_process(); | 116 pwr_discharge_timer_process(); |
120 } | 117 } |
121 #endif | 118 #endif |
122 } // end of while | 119 } // end of while |
123 return RV_OK; | 120 return RV_OK; |
124 } | 121 } |
125 | 122 |
126 | 123 |
127 | 124 |
128 /********************************************************************************** | 125 /********************************************************************************** |