FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/L1/include/l1_defty.h @ 520:ed6071292a5c
L1: first C module compiles: ind_os.c
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Thu, 10 Jul 2014 15:49:38 +0000 |
parents | afceeeb2cba1 |
children | 25a7fe25864c |
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519:57ad8f4d5cb5 | 520:ed6071292a5c |
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5 * Filename l1_defty.h | 5 * Filename l1_defty.h |
6 * Copyright 2003 (C) Texas Instruments | 6 * Copyright 2003 (C) Texas Instruments |
7 * | 7 * |
8 ************* Revision Controle System Header *************/ | 8 ************* Revision Controle System Header *************/ |
9 #if(L1_DYN_DSP_DWNLD == 1) | 9 #if(L1_DYN_DSP_DWNLD == 1) |
10 #include "l1_dyn_dwl_defty.h" | 10 #include "../dyn_dwl_include/l1_dyn_dwl_defty.h" |
11 #endif | 11 #endif |
12 | 12 |
13 typedef struct | 13 typedef struct |
14 { | 14 { |
15 UWORD16 modulus; | 15 UWORD16 modulus; |
419 // bit [10] -> b_stop_tch_ul, stop TCH/UL. | 419 // bit [10] -> b_stop_tch_ul, stop TCH/UL. |
420 // bit [11] -> b_stop_tch_dl, stop TCH/DL. | 420 // bit [11] -> b_stop_tch_dl, stop TCH/DL. |
421 // bit [12.13] -> b_tch_loop, tch loops A/B/C. | 421 // bit [12.13] -> b_tch_loop, tch loops A/B/C. |
422 API hole; // (10) unused hole. | 422 API hole; // (10) unused hole. |
423 | 423 |
424 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) | 424 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3)) |
425 API d_ctrl_abb; // (11) Bit field indicating the analog baseband register to send. | 425 API d_ctrl_abb; // (11) Bit field indicating the analog baseband register to send. |
426 // bit [0] -> b_ramp: the ramp information(a_ramp[]) is located in NDB | 426 // bit [0] -> b_ramp: the ramp information(a_ramp[]) is located in NDB |
427 // bit [1.2] -> unused | 427 // bit [1.2] -> unused |
428 // bit [3] -> b_apcdel: delays-register in NDB | 428 // bit [3] -> b_apcdel: delays-register in NDB |
429 // bit [4] -> b_afc: freq control register in DB | 429 // bit [4] -> b_afc: freq control register in DB |
550 API d_bulioff; | 550 API d_bulioff; |
551 API d_bulqoff; | 551 API d_bulqoff; |
552 API d_dai_onoff; | 552 API d_dai_onoff; |
553 API d_auxdac; | 553 API d_auxdac; |
554 | 554 |
555 #if (ANLG_FAM == 1) | 555 #if (ANALOG == 1) |
556 API d_vbctrl; | 556 API d_vbctrl; |
557 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3)) | 557 #elif ((ANALOG == 2) || (ANALOG == 3)) |
558 API d_vbctrl1; | 558 API d_vbctrl1; |
559 #endif | 559 #endif |
560 | 560 |
561 API d_bbctrl; | 561 API d_bbctrl; |
562 | 562 |
658 | 658 |
659 // GEA module defined in l1p_deft.h (the following section is overlaid with GPRS NDB memory) | 659 // GEA module defined in l1p_deft.h (the following section is overlaid with GPRS NDB memory) |
660 API d_gea_mode_ovly; | 660 API d_gea_mode_ovly; |
661 API a_gea_kc_ovly[4]; | 661 API a_gea_kc_ovly[4]; |
662 | 662 |
663 #if (ANLG_FAM == 3) | 663 #if (ANALOG == 3) |
664 // SYREN specific registers | 664 // SYREN specific registers |
665 API d_vbpop; | 665 API d_vbpop; |
666 API d_vau_delay_init; | 666 API d_vau_delay_init; |
667 API d_vaud_cfg; | 667 API d_vaud_cfg; |
668 API d_vauo_onoff; | 668 API d_vauo_onoff; |
669 API d_vaus_vol; | 669 API d_vaus_vol; |
670 API d_vaud_pll; | 670 API d_vaud_pll; |
671 API d_hole3_ndb[1]; | 671 API d_hole3_ndb[1]; |
672 #elif ((ANLG_FAM == 1) || (ANLG_FAM == 2)) | 672 #elif ((ANALOG == 1) || (ANALOG == 2)) |
673 | 673 |
674 API d_hole3_ndb[7]; | 674 API d_hole3_ndb[7]; |
675 | 675 |
676 #endif | 676 #endif |
677 | 677 |
894 API d_bulioff; | 894 API d_bulioff; |
895 API d_bulqoff; | 895 API d_bulqoff; |
896 API d_dai_onoff; | 896 API d_dai_onoff; |
897 API d_auxdac; | 897 API d_auxdac; |
898 | 898 |
899 #if (ANLG_FAM == 1) | 899 #if (ANALOG == 1) |
900 API d_vbctrl; | 900 API d_vbctrl; |
901 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3)) | 901 #elif ((ANALOG == 2) || (ANALOG == 3)) |
902 API d_vbctrl1; | 902 API d_vbctrl1; |
903 #endif | 903 #endif |
904 | 904 |
905 API d_bbctrl; | 905 API d_bbctrl; |
906 | 906 |
1155 API d_tch_mode; // TCH mode register. | 1155 API d_tch_mode; // TCH mode register. |
1156 // bit [0..1] -> b_dai_mode. | 1156 // bit [0..1] -> b_dai_mode. |
1157 // bit [2] -> b_dtx. | 1157 // bit [2] -> b_dtx. |
1158 | 1158 |
1159 // OMEGA...........................(MCU -> DSP). | 1159 // OMEGA...........................(MCU -> DSP). |
1160 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2)) | 1160 #if ((ANALOG == 1) || (ANALOG == 2)) |
1161 API a_ramp[16]; | 1161 API a_ramp[16]; |
1162 #if (MELODY_E1) | 1162 #if (MELODY_E1) |
1163 API d_melo_osc_used; | 1163 API d_melo_osc_used; |
1164 API d_melo_osc_active; | 1164 API d_melo_osc_active; |
1165 API a_melo_note0[4]; | 1165 API a_melo_note0[4]; |
1213 API d_bulioff; | 1213 API d_bulioff; |
1214 API d_bulqoff; | 1214 API d_bulqoff; |
1215 API d_dai_onoff; | 1215 API d_dai_onoff; |
1216 API d_auxdac; | 1216 API d_auxdac; |
1217 | 1217 |
1218 #if (ANLG_FAM == 1) | 1218 #if (ANALOG == 1) |
1219 API d_vbctrl; | 1219 API d_vbctrl; |
1220 #elif (ANLG_FAM == 2) | 1220 #elif (ANALOG == 2) |
1221 API d_vbctrl1; | 1221 API d_vbctrl1; |
1222 #endif | 1222 #endif |
1223 | 1223 |
1224 API d_bbctrl; | 1224 API d_bbctrl; |
1225 #else | 1225 #else |
1385 // bit [0..1] -> b_dai_mode. | 1385 // bit [0..1] -> b_dai_mode. |
1386 // bit [2] -> b_dtx. | 1386 // bit [2] -> b_dtx. |
1387 | 1387 |
1388 // OMEGA...........................(MCU -> DSP). | 1388 // OMEGA...........................(MCU -> DSP). |
1389 | 1389 |
1390 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2)) | 1390 #if ((ANALOG == 1) || (ANALOG == 2)) |
1391 API a_ramp[16]; | 1391 API a_ramp[16]; |
1392 #if (MELODY_E1) | 1392 #if (MELODY_E1) |
1393 API d_melo_osc_used; | 1393 API d_melo_osc_used; |
1394 API d_melo_osc_active; | 1394 API d_melo_osc_active; |
1395 API a_melo_note0[4]; | 1395 API a_melo_note0[4]; |
1441 API d_apcoff; | 1441 API d_apcoff; |
1442 API d_bulioff; | 1442 API d_bulioff; |
1443 API d_bulqoff; | 1443 API d_bulqoff; |
1444 API d_dai_onoff; | 1444 API d_dai_onoff; |
1445 API d_auxdac; | 1445 API d_auxdac; |
1446 #if (ANLG_FAM == 1) | 1446 #if (ANALOG == 1) |
1447 API d_vbctrl; | 1447 API d_vbctrl; |
1448 #elif (ANLG_FAM == 2) | 1448 #elif (ANALOG == 2) |
1449 API d_vbctrl1; | 1449 API d_vbctrl1; |
1450 #endif | 1450 #endif |
1451 API d_bbctrl; | 1451 API d_bbctrl; |
1452 | 1452 |
1453 #else | 1453 #else |
2832 | 2832 |
2833 #if DCO_ALGO | 2833 #if DCO_ALGO |
2834 BOOL dco_enabled; | 2834 BOOL dco_enabled; |
2835 #endif | 2835 #endif |
2836 | 2836 |
2837 #if (ANLG_FAM == 1) | 2837 #if (ANALOG == 1) |
2838 UWORD16 debug1; | 2838 UWORD16 debug1; |
2839 UWORD16 afcctladd; | 2839 UWORD16 afcctladd; |
2840 UWORD16 vbuctrl; | 2840 UWORD16 vbuctrl; |
2841 UWORD16 vbdctrl; | 2841 UWORD16 vbdctrl; |
2842 UWORD16 bbctrl; | 2842 UWORD16 bbctrl; |
2846 UWORD16 dai_onoff; | 2846 UWORD16 dai_onoff; |
2847 UWORD16 auxdac; | 2847 UWORD16 auxdac; |
2848 UWORD16 vbctrl; | 2848 UWORD16 vbctrl; |
2849 UWORD16 apcdel1; | 2849 UWORD16 apcdel1; |
2850 #endif | 2850 #endif |
2851 #if (ANLG_FAM == 2) | 2851 #if (ANALOG == 2) |
2852 UWORD16 debug1; | 2852 UWORD16 debug1; |
2853 UWORD16 afcctladd; | 2853 UWORD16 afcctladd; |
2854 UWORD16 vbuctrl; | 2854 UWORD16 vbuctrl; |
2855 UWORD16 vbdctrl; | 2855 UWORD16 vbdctrl; |
2856 UWORD16 bbctrl; | 2856 UWORD16 bbctrl; |
2863 UWORD16 vbctrl1; | 2863 UWORD16 vbctrl1; |
2864 UWORD16 vbctrl2; | 2864 UWORD16 vbctrl2; |
2865 UWORD16 apcdel1; | 2865 UWORD16 apcdel1; |
2866 UWORD16 apcdel2; | 2866 UWORD16 apcdel2; |
2867 #endif | 2867 #endif |
2868 #if (ANLG_FAM == 3) | 2868 #if (ANALOG == 3) |
2869 UWORD16 debug1; | 2869 UWORD16 debug1; |
2870 UWORD16 afcctladd; | 2870 UWORD16 afcctladd; |
2871 UWORD16 vbuctrl; | 2871 UWORD16 vbuctrl; |
2872 UWORD16 vbdctrl; | 2872 UWORD16 vbdctrl; |
2873 UWORD16 bbctrl; | 2873 UWORD16 bbctrl; |