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comparison gsm-fw/L1/tpudrv/tpudrv12.c @ 583:ff1065828669

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tpudrv12.c: l1dmacro_init_hw() done
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Fri, 15 Aug 2014 21:49:39 +0000
parents 81753f5e902e
children d42078e35ac9
comparison
equal deleted inserted replaced
582:81753f5e902e 583:ff1065828669
840 TP_Ptr = (UWORD16 *) TPU_RAM; 840 TP_Ptr = (UWORD16 *) TPU_RAM;
841 841
842 // Set FEM to inactive state before turning ON the RF Board 842 // Set FEM to inactive state before turning ON the RF Board
843 // At this point the RF regulators are still OFF. Thus the 843 // At this point the RF regulators are still OFF. Thus the
844 // FEM command is not inverted yet => Must use the FEM "SLEEP programming" 844 // FEM command is not inverted yet => Must use the FEM "SLEEP programming"
845 845 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01);
846 846
847 // TPU_SLEEP 847 // TPU_SLEEP
848 l1dmacro_idle(); 848 l1dmacro_idle();
849 849
850 *TP_Ptr++ = TPU_AT(t); 850 *TP_Ptr++ = TPU_AT(t);
851 *TP_Ptr++ = TPU_SYNC(0); 851 *TP_Ptr++ = TPU_SYNC(0);
852 852
853 //Check Initialisation or Reset for TPU2OCP 853 /* from disassembly, differs from LoCosto version */
854 854 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x20);
855 855 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06);
856 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, TXM_SLEEP); 856 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET3, 0x00);
857 857
858 t = 1000; // arbitrary start time 858 t = 1000; // arbitrary start time
859 859
860 t = rf_init(t); // Initialize RF Board 860 t = rf_init(t); // Initialize RF Board
861 861
885 *TP_Ptr++ = TPU_AT(t); // 885 *TP_Ptr++ = TPU_AT(t); //
886 l1dmacro_idle(); // 886 l1dmacro_idle(); //
887 887
888 return; 888 return;
889 } 889 }
890
891 //BHO added
892 /*
893 * l1dmacro_rx_fbsb
894 *
895 * Receive Frequency burst
896 */
897
898 #if ((REL99 == 1) && (FF_BHO == 1))
899 #if(L1_RF_KBD_FIX == 1)
900 #if (L1_MADC_ON == 1)
901 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq, UWORD8 adc_active)
902 #else
903 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq)
904 #endif
905 {
906 #if (L1_MADC_ON == 1)
907 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB
908 #if(NEW_SNR_THRESHOLD==1)
909 , SAIC_OFF
910 #endif
911 );
912 #else
913 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB);
914 #endif
915
916
917 // same as rx_fb
918 *TP_Ptr++ = TPU_AT(0); // 1
919 *TP_Ptr++ = TPU_AT(0); // 2
920 *TP_Ptr++ = TPU_AT(0); // 3
921 *TP_Ptr++ = TPU_AT(0); // 4
922 *TP_Ptr++ = TPU_AT(0); // 5
923 *TP_Ptr++ = TPU_AT(0); // 6
924 *TP_Ptr++ = TPU_AT(0); // 7
925 *TP_Ptr++ = TPU_AT(0); // 8
926 *TP_Ptr++ = TPU_AT(0); // 9
927 *TP_Ptr++ = TPU_AT(0); // 10
928 *TP_Ptr++ = TPU_AT(0); // 11
929
930 // one more for SB
931 *TP_Ptr++ = TPU_AT(0); // 12
932
933 l1dmacro_rx_down (STOP_RX_FBSB);
934 }
935 #endif/*(L1_RF_KBD_FIX == 1)*/
936
937 #if(L1_RF_KBD_FIX == 0)
938 #if (L1_MADC_ON == 1)
939 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq, UWORD8 adc_active)
940 #else
941 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq)
942 #endif
943 {
944 #if (L1_MADC_ON == 1)
945 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER);
946 #else
947 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER);
948 #endif
949
950 // same as rx_fb
951 *TP_Ptr++ = TPU_AT(0); // 1
952 *TP_Ptr++ = TPU_AT(0); // 2
953 *TP_Ptr++ = TPU_AT(0); // 3
954 *TP_Ptr++ = TPU_AT(0); // 4
955 *TP_Ptr++ = TPU_AT(0); // 5
956 *TP_Ptr++ = TPU_AT(0); // 6
957 *TP_Ptr++ = TPU_AT(0); // 7
958 *TP_Ptr++ = TPU_AT(0); // 8
959 *TP_Ptr++ = TPU_AT(0); // 9
960 *TP_Ptr++ = TPU_AT(0); // 10
961 *TP_Ptr++ = TPU_AT(0); // 11
962
963 // one more for SB
964 *TP_Ptr++ = TPU_AT(0); // 12
965
966 l1dmacro_rx_down (STOP_RX_FBSB);
967 }
968 #endif/*(L1_RF_KBD_FIX == 0)*/
969 #endif // #if ((REL99 == 1) && (FF_BHO == 1))
970
971 ////BHO