FreeCalypso > hg > freecalypso-sw
diff gsm-fw/bsp/sim.c @ 645:14826aa2db26
SIM integration: sim.c compiles; massive cleaning for readability
| author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
|---|---|
| date | Wed, 03 Sep 2014 22:11:25 +0000 |
| parents | 5e0e41cd7c9f |
| children |
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--- a/gsm-fw/bsp/sim.c Wed Sep 03 20:29:54 2014 +0000 +++ b/gsm-fw/bsp/sim.c Wed Sep 03 22:11:25 2014 +0000 @@ -16,26 +16,21 @@ #define SIM_C 1 -#ifndef _WINDOWS - #include "l1sw.cfg" - #include "chipset.cfg" -#endif - -#include "main/sys_types.h" - -#include "memif/mem.h" - -//#include "assert.h" +#include "../include/config.h" +#include "../include/sys_types.h" + +#include "mem.h" + #if (CHIPSET == 12) - #include "inth/sys_inth.h" + #include "sys_inth.h" #else - #include "inth/iq.h" + #include "iq.h" #endif #include "sim.h" #include <string.h> -#include "armio/armio.h" -#include "ind_os.h" -#include "abb/abb.h" //controls level shifter of ABB +#include "armio.h" +#include "../L1/cust0/ind_os.h" +#include "abb+spi/abb.h" //controls level shifter of ABB //current voltage mode 3V or 5V, or 1.8V @@ -80,10 +75,6 @@ #endif - - - - /* * Low level routines : mapped to hardware * SIM_WriteBuffer @@ -93,7 +84,6 @@ */ - /* * SIM_WriteBuffer * @@ -132,7 +122,6 @@ { // return the direction to rx p->conf1 &= ~SIM_CONF1_TXRX; //to be able to receive ACK char p->c->conf1 = p->conf1; - } } @@ -156,7 +145,7 @@ len = p->rx_index; *lenP = len - offset; if ((*lenP == 0) && (p->apdu_ans_length == 256)) - *lenP = 256; + *lenP = 256; if (p->expected_data == 256) { @@ -182,10 +171,6 @@ return((sw1 << 8) | sw2); } - - - - /* * SIM_Command_base * @@ -204,7 +189,8 @@ * with wrapper. Created to manage retries on Internals errors of the driver. */ -SYS_UWORD16 SIM_Command_Base(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *dP, SYS_UWORD16 *lP) +SYS_UWORD16 SIM_Command_Base(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *dP, + SYS_UWORD16 *lP) { SYS_UWORD16 res; SYS_UWORD8 err; @@ -220,7 +206,8 @@ else if (SIM_sleep_status == SIM_SLEEP_ACT) { //get out sleep mode status_os_sim = NU_Control_Timer (&SIM_timer, NU_DISABLE_TIMER); - SIM_SleepMode_Out (p); //get up SIM card of sleep mode before executing the command + SIM_SleepMode_Out (p); //get up SIM card of sleep mode + // before executing the command } SIM_WriteBuffer(p, 0, 5); @@ -242,7 +229,8 @@ if (err = SIM_Waitforchars(p, p->etu9600)) { - if ((SIM_sleep_status == SIM_SLEEP_DESACT) || (SIM_sleep_status == SIM_SLEEP_ACT)) + if ((SIM_sleep_status == SIM_SLEEP_DESACT) || + (SIM_sleep_status == SIM_SLEEP_ACT)) { //enable to count 2.5s before entering in sleep mode status_os_sim = NU_Reset_Timer (&SIM_timer, SIM_SleepMode_In, SIM_SLEEP_WAITING_TIME, @@ -255,7 +243,8 @@ { res = SIM_Result(p, dP, lP, 0); - if ((SIM_sleep_status == SIM_SLEEP_DESACT) || (SIM_sleep_status == SIM_SLEEP_ACT)) + if ((SIM_sleep_status == SIM_SLEEP_DESACT) || + (SIM_sleep_status == SIM_SLEEP_ACT)) { //enable to count 2.5s before entering in sleep mode status_os_sim = NU_Reset_Timer (&SIM_timer, SIM_SleepMode_In, SIM_SLEEP_WAITING_TIME, @@ -284,7 +273,8 @@ p->moderx = 5; if (err = SIM_Waitforchars (p, p->etu9600)) //wait SW1 / SW2 { - if ((SIM_sleep_status == SIM_SLEEP_DESACT) || (SIM_sleep_status == SIM_SLEEP_ACT)) + if ((SIM_sleep_status == SIM_SLEEP_DESACT) || + (SIM_sleep_status == SIM_SLEEP_ACT)) { //enable to count 2.5s before entering in sleep mode status_os_sim = NU_Reset_Timer (&SIM_timer, SIM_SleepMode_In, SIM_SLEEP_WAITING_TIME, @@ -298,7 +288,8 @@ { if (err = SIM_WaitReception(p)) //wait for next procedure character { - if ((SIM_sleep_status == SIM_SLEEP_DESACT) || (SIM_sleep_status == SIM_SLEEP_ACT)) + if ((SIM_sleep_status == SIM_SLEEP_DESACT) || + (SIM_sleep_status == SIM_SLEEP_ACT)) { //enable to count 2.5s before entering in sleep mode status_os_sim = NU_Reset_Timer (&SIM_timer, SIM_SleepMode_In, SIM_SLEEP_WAITING_TIME, @@ -310,7 +301,8 @@ res = SIM_Result(p, dP, lP, 0); - if ((SIM_sleep_status == SIM_SLEEP_DESACT) || (SIM_sleep_status == SIM_SLEEP_ACT)) + if ((SIM_sleep_status == SIM_SLEEP_DESACT) || + (SIM_sleep_status == SIM_SLEEP_ACT)) { //enable to count 2.5s before entering in sleep mode status_os_sim = NU_Reset_Timer (&SIM_timer, SIM_SleepMode_In, SIM_SLEEP_WAITING_TIME, @@ -322,44 +314,41 @@ /* Main function to manage the retry mechanism */ -SYS_UWORD16 SIM_Command(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *dP, SYS_UWORD16 *lP) { - int res; +SYS_UWORD16 SIM_Command(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *dP, + SYS_UWORD16 *lP) +{ + int res; #ifdef SIM_DEBUG_TRACE - memset(SIM_dbg_null, 0x00, SIM_DBG_NULL); - SIM_dbg_tdma_diff = 0; + memset(SIM_dbg_null, 0x00, SIM_DBG_NULL); + SIM_dbg_tdma_diff = 0; #endif - // Issue initial SIM_Command() call + // Issue initial SIM_Command() call res = SIM_Command_Base(p, n, dP, lP); /* Change from to 10 to 15 for specific SIM card (Racal) */ #ifdef SIM_RETRY // While there is an error then retry NUM_SIM_RETRIES times - while ((res & 0xFF00) == 0) { // Reissue command - p->errorSIM = 0; - if(++SimRetries > NUM_SIM_RETRIES) { // return special retry failure - res = SIM_ERR_RETRY_FAILURE; - break; - } - res = SIM_Command_Base(p, n, dP, lP); + while ((res & 0xFF00) == 0) { // Reissue command + p->errorSIM = 0; + if(++SimRetries > NUM_SIM_RETRIES) { // return special retry failure + res = SIM_ERR_RETRY_FAILURE; + break; } + res = SIM_Command_Base(p, n, dP, lP); + } #ifdef SIM_DEBUG_TRACE - SIM_dbg_null[SIM_DBG_NULL-1] = SimRetries; + SIM_dbg_null[SIM_DBG_NULL-1] = SimRetries; #endif - SimRetries = 0; + SimRetries = 0; #endif return(res); } - - - - - /* * SIM_ByteReverse * @@ -382,7 +371,6 @@ b = (Reverse[bl]) << 4 | Reverse[bh]; return(b); - } /* @@ -421,15 +409,9 @@ */ SYS_UWORD16 SIM_Reset(SIM_CARD *cP) { - return(SIM_Reset_Restart_Internal(cP, 1)); + return(SIM_Reset_Restart_Internal(cP, 1)); } - - - - - - /* * SIM_Restart * @@ -446,7 +428,7 @@ */ SYS_UWORD16 SIM_Restart(SIM_CARD *cP) { - return(SIM_Reset_Restart_Internal(cP, 0)); + return(SIM_Reset_Restart_Internal(cP, 0)); } @@ -475,9 +457,9 @@ SYS_UWORD8 Result_ATR; #ifdef SIM_DEBUG_TRACE - memset(SIM_dbg_null, 0x00, SIM_DBG_NULL); - SIM_dbg_cmd_cmpt = 0; - memset(SIM_dbg_cmd, 0x00, SIM_DBG_CMD); + memset(SIM_dbg_null, 0x00, SIM_DBG_NULL); + SIM_dbg_cmd_cmpt = 0; + memset(SIM_dbg_cmd, 0x00, SIM_DBG_CMD); #endif // Initialize pointers @@ -537,9 +519,9 @@ // p->c->conf2 = 0x0940; // // //enable VCC -// #if(ANLG_FAM == 1) +// #if(ANALOG == 1) // SPIABB_wa_VRPC (SPIRead_ABB_Register (PAGE1,VRPCCTRL1) | MODE_ENA_VCC); -// #elif(ANLG_FAM == 2) +// #elif(ANALOG == 2) // SPIABB_wa_VRPC (SPIRead_ABB_Register (PAGE1,VRPCSIM) | MODE_ENA_VCC); // #endif // p->c->cmd = (p->c->cmd & MASK_CMD) | SIM_CMD_START; @@ -713,21 +695,11 @@ if (ResetFlag) { if (p->InsertFunc != NULL) (p->InsertFunc)(cP); - } - - return(0); + } + + return(0); } - - - - - - - - - - /* SIM manual start * * purpose : manage manual start of the SIM interface @@ -774,19 +746,19 @@ p->c->conf1 = p->conf1 |= SIM_CONF1_SVCCLEV; ind_os_sleep(1); - #if(ANLG_FAM == 1) + #if(ANALOG == 1) //set OMEGA to 3V mode //enable VCC ABB_wa_VRPC (ABB_Read_Register_on_page(PAGE1,VRPCCTRL1) | MODE_ENA_SIMLDOEN); ind_os_sleep(1); ABB_wa_VRPC (ABB_Read_Register_on_page(PAGE1,VRPCCTRL1) | MODE_ENA_SIMEN); ind_os_sleep(1); - #elif(ANLG_FAM == 2) + #elif(ANALOG == 2) //set IOTA to 3V mode //enable VCC ABB_wa_VRPC (ABB_Read_Register_on_page(PAGE1,VRPCSIM) | MODE_ENA_SIMEN); ind_os_sleep(1); - #elif(ANLG_FAM == 3) + #elif(ANALOG == 3) //set SYREN to 3V mode //enable VCC ABB_wa_VRPC (ABB_Read_Register_on_page(PAGE1,VRPCSIMR) | MODE_ENA_SIMEN); @@ -852,27 +824,24 @@ SIM_PORT *p; volatile SYS_UWORD16 cmd; - - // Initialize pointers p = &(Sim[0]); - // Reset and wait a while cmd = p->c->cmd; p->c->cmd = (cmd & MASK_CMD) | SIM_CMD_STOP; ind_os_sleep(5); //wait for falling of SIM signals (RESET/CLK/IO) - #if(ANLG_FAM == 1) + #if(ANALOG == 1) //disable VCC : disable level shifter then SVDD ABB_wa_VRPC (ABB_Read_Register_on_page(PAGE1,VRPCCTRL1) & MODE_DIS_SIMEN); ABB_wa_VRPC (ABB_Read_Register_on_page(PAGE1,VRPCCTRL1) & MODE_DIS_SIMLDOEN); - #elif(ANLG_FAM == 2) + #elif(ANALOG == 2) //disable VCC : disable level shifter then SVDD ABB_wa_VRPC (ABB_Read_Register_on_page(PAGE1,VRPCSIM) & MODE_DIS_SIMEN); ABB_wa_VRPC (ABB_Read_Register_on_page(PAGE1,VRPCSIM) & MODE_DIS_SIMLDOEN); - #elif(ANLG_FAM == 3) + #elif(ANALOG == 3) //disable VCC : disable level shifter then SVDD ABB_wa_VRPC (ABB_Read_Register_on_page(PAGE1,VRPCSIMR) & MODE_DIS_SIMEN); ABB_wa_VRPC (ABB_Read_Register_on_page(PAGE1,VRPCSIMR) & MODE_DIS_SIMLDOEN); @@ -986,7 +955,7 @@ { SIM_PORT *p; int res; - + p = &(Sim[0]); p->xbuf[0] = GSM_CLASS; @@ -997,7 +966,6 @@ p->xbuf[5] = id >> 8; // high byte p->xbuf[6] = id & 0xFF; // low byte - res = SIM_Command(p, 2, dat, rcvSize); /* Change from to 10 to 15 for specific SIM card (Racal) */ @@ -1005,18 +973,18 @@ // SIM_flag = 1; #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AACMD", 5); - SIM_dbg_write_trace(p->xbuf, 7); - SIM_dbg_write_trace((SYS_UWORD8 *)"AAANS", 5); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AACMD", 5); + SIM_dbg_write_trace(p->xbuf, 7); + SIM_dbg_write_trace((SYS_UWORD8 *)"AAANS", 5); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); @@ -1046,18 +1014,18 @@ res = SIM_Command(p, 0, dat, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"ABCMD", 5); - SIM_dbg_write_trace(p->xbuf, 5); - SIM_dbg_write_trace((SYS_UWORD8 *)"ABANS", 5); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"ABCMD", 5); + SIM_dbg_write_trace(p->xbuf, 5); + SIM_dbg_write_trace((SYS_UWORD8 *)"ABANS", 5); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); @@ -1069,11 +1037,12 @@ * Returns data received from card and number of bytes received * Add extra parameter len : number of returned byte */ -SYS_UWORD16 SIM_Status_Extended(SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_Status_Extended(SYS_UWORD8 *dat, SYS_UWORD16 len, + SYS_UWORD16 *rcvSize) { SIM_PORT *p; int res; - SYS_UWORD16 llen = len & SIM_UWORD16_MASK; + SYS_UWORD16 llen = len & SIM_UWORD16_MASK; p = &(Sim[0]); @@ -1086,18 +1055,18 @@ res = SIM_Command(p, 0, dat, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"ACCMD", 5); - SIM_dbg_write_trace(p->xbuf, 5); - SIM_dbg_write_trace((SYS_UWORD8 *)"ACANS", 5); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"ACCMD", 5); + SIM_dbg_write_trace(p->xbuf, 5); + SIM_dbg_write_trace((SYS_UWORD8 *)"ACANS", 5); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); @@ -1109,11 +1078,12 @@ * * Read data from the current EF */ -SYS_UWORD16 SIM_ReadBinary(SYS_UWORD8 *dat, SYS_UWORD16 offset, SYS_UWORD16 len, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_ReadBinary(SYS_UWORD8 *dat, SYS_UWORD16 offset, + SYS_UWORD16 len, SYS_UWORD16 *rcvSize) { SIM_PORT *p; int res; - SYS_UWORD16 llen = len & SIM_UWORD16_MASK; + SYS_UWORD16 llen = len & SIM_UWORD16_MASK; p = &(Sim[0]); @@ -1131,35 +1101,34 @@ // } #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"ADCMD", 5); - SIM_dbg_write_trace(p->xbuf, 5); - SIM_dbg_write_trace((SYS_UWORD8 *)"ADANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize>>8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(dat, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"ADCMD", 5); + SIM_dbg_write_trace(p->xbuf, 5); + SIM_dbg_write_trace((SYS_UWORD8 *)"ADANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize>>8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(dat, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); - } - /* * SIM_VerifyChv * * Verify the specified CHV (chvType) */ -SYS_UWORD16 SIM_VerifyCHV(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 chvType, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_VerifyCHV(SYS_UWORD8 *result, SYS_UWORD8 *dat, + SYS_UWORD8 chvType, SYS_UWORD16 *rcvSize) { SIM_PORT *p; SYS_UWORD8 len; @@ -1181,22 +1150,22 @@ res = SIM_Command(p, 8, result, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AECMD", 5); - SIM_dbg_write_trace(p->xbuf, len+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AEANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AECMD", 5); + SIM_dbg_write_trace(p->xbuf, len+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AEANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); @@ -1208,7 +1177,8 @@ * * Authentication procedure */ -SYS_UWORD16 SIM_RunGSMAlgo(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_RunGSMAlgo(SYS_UWORD8 *result, SYS_UWORD8 *dat, + SYS_UWORD16 *rcvSize) { SIM_PORT *p; int len; @@ -1235,28 +1205,27 @@ res = SIM_Command(p, len, result, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AFCMD", 5); - SIM_dbg_write_trace(p->xbuf, len+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AFANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AFCMD", 5); + SIM_dbg_write_trace(p->xbuf, len+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AFANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif if(p->Freq_Algo) p->c->conf1 = p->conf1 |= SIM_CONF1_SCLKDIV; - return(res); } @@ -1268,11 +1237,12 @@ * * SYS_UWORD8 len : length of the data to get */ -SYS_UWORD16 SIM_GetResponse(SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_GetResponse(SYS_UWORD8 *dat, SYS_UWORD16 len, + SYS_UWORD16 *rcvSize) { SIM_PORT *p; int res; - SYS_UWORD16 llen = len & SIM_UWORD16_MASK; + SYS_UWORD16 llen = len & SIM_UWORD16_MASK; p = &(Sim[0]); @@ -1285,22 +1255,22 @@ res = SIM_Command(p, 0, dat, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AGCMD", 5); - SIM_dbg_write_trace(p->xbuf, 5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AGANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(dat, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AGCMD", 5); + SIM_dbg_write_trace(p->xbuf, 5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AGANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(dat, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); @@ -1312,7 +1282,9 @@ * * Change the specified CHV (chvType) */ -SYS_UWORD16 SIM_ChangeCHV(SYS_UWORD8 *result,SYS_UWORD8 *oldChv, SYS_UWORD8 *newChv, SYS_UWORD8 chvType, SYS_UWORD16 *lP) +SYS_UWORD16 SIM_ChangeCHV(SYS_UWORD8 *result,SYS_UWORD8 *oldChv, + SYS_UWORD8 *newChv, SYS_UWORD8 chvType, + SYS_UWORD16 *lP) { SIM_PORT *p; SYS_UWORD16 len; @@ -1340,22 +1312,22 @@ res = SIM_Command(p, len, result, lP); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AHCMD", 5); - SIM_dbg_write_trace(p->xbuf, len+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AHANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *lP); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AHCMD", 5); + SIM_dbg_write_trace(p->xbuf, len+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AHANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *lP); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); @@ -1389,26 +1361,25 @@ res = SIM_Command(p, len, result, lP); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AICMD", 5); - SIM_dbg_write_trace(p->xbuf, 8+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AIANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *lP); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AICMD", 5); + SIM_dbg_write_trace(p->xbuf, 8+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AIANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *lP); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); - } @@ -1442,36 +1413,35 @@ res = SIM_Command(p, len, result, lP); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AJCMD", 5); - SIM_dbg_write_trace(p->xbuf, len+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AJANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *lP); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AJCMD", 5); + SIM_dbg_write_trace(p->xbuf, len+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AJANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *lP); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); } - - /* * SIM_UnblockCHV * * Unblock the specified CHV (chvType) and store a new CHV */ -SYS_UWORD16 SIM_UnblockCHV(SYS_UWORD8 *result, SYS_UWORD8 *unblockChv, SYS_UWORD8 *newChv, - SYS_UWORD8 chvType, SYS_UWORD16 *lP) +SYS_UWORD16 SIM_UnblockCHV(SYS_UWORD8 *result, SYS_UWORD8 *unblockChv, + SYS_UWORD8 *newChv, SYS_UWORD8 chvType, + SYS_UWORD16 *lP) { SIM_PORT *p; int len; @@ -1498,26 +1468,27 @@ res = SIM_Command(p, len, result, lP); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AKCMD", 5); - SIM_dbg_write_trace(p->xbuf, len+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AKANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *lP); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AKCMD", 5); + SIM_dbg_write_trace(p->xbuf, len+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AKANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *lP); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); } + /* * SIM_Invalidate * @@ -1540,26 +1511,27 @@ res = SIM_Command(p, 0, rP, lP); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"ALCMD", 5); - SIM_dbg_write_trace(p->xbuf, 5); - SIM_dbg_write_trace((SYS_UWORD8 *)"ALANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(rP, *lP); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"ALCMD", 5); + SIM_dbg_write_trace(p->xbuf, 5); + SIM_dbg_write_trace((SYS_UWORD8 *)"ALANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(rP, *lP); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); } + /* * SIM_Rehabilitate * @@ -1582,26 +1554,25 @@ res = SIM_Command(p, 0, rP, lP); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AMCMD", 5); - SIM_dbg_write_trace(p->xbuf, 5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AMANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(rP, *lP); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AMCMD", 5); + SIM_dbg_write_trace(p->xbuf, 5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AMANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*lP >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*lP); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(rP, *lP); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); - } @@ -1610,12 +1581,14 @@ * * Store data in the current transparent EF */ -SYS_UWORD16 SIM_UpdateBinary(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 offset, SYS_UWORD16 len, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_UpdateBinary(SYS_UWORD8 *result, SYS_UWORD8 *dat, + SYS_UWORD16 offset, SYS_UWORD16 len, + SYS_UWORD16 *rcvSize) { SIM_PORT *p; int i; int res; - SYS_UWORD16 llen = len & SIM_UWORD16_MASK; + SYS_UWORD16 llen = len & SIM_UWORD16_MASK; p = &(Sim[0]); @@ -1632,26 +1605,25 @@ res = SIM_Command(p, llen, result, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"ANCMD", 5); - SIM_dbg_write_trace(p->xbuf, llen+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"ANANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"ANCMD", 5); + SIM_dbg_write_trace(p->xbuf, llen+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"ANANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); - } @@ -1660,11 +1632,12 @@ * * Read a record (recNum) from the current linear fixed or cyclic EF */ -SYS_UWORD16 SIM_ReadRecord(SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD8 recNum, SYS_UWORD16 len, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_ReadRecord(SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD8 recNum, + SYS_UWORD16 len, SYS_UWORD16 *rcvSize) { SIM_PORT *p; int res; - SYS_UWORD16 llen = len & SIM_UWORD16_MASK; + SYS_UWORD16 llen = len & SIM_UWORD16_MASK; p = &(Sim[0]); @@ -1677,26 +1650,25 @@ res = SIM_Command(p, 0, dat, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AOCMD", 5); - SIM_dbg_write_trace(p->xbuf, llen+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AOANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(dat, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AOCMD", 5); + SIM_dbg_write_trace(p->xbuf, llen+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AOANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(dat, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); - } #ifdef SIM_APDU_TEST @@ -1718,12 +1690,14 @@ * * Store a record (recNum) in the current linear fixed or cyclic EF */ -SYS_UWORD16 SIM_UpdateRecord(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD8 recNum, SYS_UWORD16 len, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_UpdateRecord(SYS_UWORD8 *result, SYS_UWORD8 *dat, + SYS_UWORD8 mode, SYS_UWORD8 recNum, + SYS_UWORD16 len, SYS_UWORD16 *rcvSize) { SIM_PORT *p; int i; int res; - SYS_UWORD16 llen = len & SIM_UWORD16_MASK; + SYS_UWORD16 llen = len & SIM_UWORD16_MASK; #ifdef SIM_SAT_REFRESH_TEST // do 1000 times the following sequence @@ -1735,102 +1709,98 @@ } #endif #ifdef SIM_APDU_TEST - // send OPEN LOGICAL CHANNEL - snd[0] = 0x00; - snd[1] = 0x70; + // send OPEN LOGICAL CHANNEL + snd[0] = 0x00; + snd[1] = 0x70; + snd[2] = 0x00; + snd[3] = 0x00; + snd[4] = 0x01; + resopen = SIM_XchTPDU(&snd[0], 5, &rec[0], 1, &recl); + if (resopen == 0x9000) { + logchan = rec[0]; + + // Select AID PKCS + snd[0] = logchan; + snd[1] = 0xA4; + snd[2] = 0x04; + snd[3] = 0x00; + snd[4] = 0x0C; + snd[5] = 0xA0; + snd[6] = 0x00; + snd[7] = 0x00; + snd[8] = 0x00; + snd[9] = 0x63; + snd[10] = 0x50; + snd[11] = 0x4B; + snd[12] = 0x43; + snd[13] = 0x53; + snd[14] = 0x2D; + snd[15] = 0x31; + snd[16] = 0x35; + rescmd = SIM_XchTPDU(&snd[0], 17, &rec[0], 0, &recl); + + // Select file EF odf + snd[0] = 0x80 | logchan; + snd[1] = 0xA4; + snd[2] = 0x00; + snd[3] = 0x00; + snd[4] = 0x02; + snd[5] = 0x50; + snd[6] = 0x31; + rescmd = SIM_XchTPDU(&snd[0], 7, &rec[0], 0, &recl); + + // get response EF odf + snd[0] = logchan; + snd[1] = 0xC0; snd[2] = 0x00; snd[3] = 0x00; - snd[4] = 0x01; - resopen = SIM_XchTPDU(&snd[0], 5, &rec[0], 1, &recl); - if (resopen == 0x9000) { - logchan = rec[0]; - - // Select AID PKCS - snd[0] = logchan; - snd[1] = 0xA4; - snd[2] = 0x04; - snd[3] = 0x00; - snd[4] = 0x0C; - snd[5] = 0xA0; - snd[6] = 0x00; - snd[7] = 0x00; - snd[8] = 0x00; - snd[9] = 0x63; - snd[10] = 0x50; - snd[11] = 0x4B; - snd[12] = 0x43; - snd[13] = 0x53; - snd[14] = 0x2D; - snd[15] = 0x31; - snd[16] = 0x35; - rescmd = SIM_XchTPDU(&snd[0], 17, &rec[0], 0, &recl); - - // Select file EF odf - snd[0] = 0x80 | logchan; - snd[1] = 0xA4; - snd[2] = 0x00; - snd[3] = 0x00; - snd[4] = 0x02; - snd[5] = 0x50; - snd[6] = 0x31; - rescmd = SIM_XchTPDU(&snd[0], 7, &rec[0], 0, &recl); - - // get response EF odf - snd[0] = logchan; - snd[1] = 0xC0; - snd[2] = 0x00; - snd[3] = 0x00; - snd[4] = rescmd; - rescmd = SIM_XchTPDU(&snd[0], 5, &rec[0], snd[4], &recl); - - // read binary EF odf - snd[0] = 0x80 | logchan; - snd[1] = 0xB0; - snd[2] = 0x00; - snd[3] = 0x00; - snd[4] = rec[3]-16; - rescmd = SIM_XchTPDU(&snd[0], 5, &rec[0], snd[4], &recl); - - // Select file EF cdf - snd[0] = 0x80 | logchan; - snd[1] = 0xA4; - snd[2] = 0x00; - snd[3] = 0x00; - snd[4] = 0x02; - snd[5] = 0x51; - snd[6] = 0x03; - rescmd = SIM_XchTPDU(&snd[0], 7, &rec[0], 0, &recl); - - // get response EF odf - snd[0] = logchan; - snd[1] = 0xC0; - snd[2] = 0x00; - snd[3] = 0x00; - snd[4] = rescmd; - rescmd = SIM_XchTPDU(&snd[0], 5, &rec[0], snd[4], &recl); - - // read binary EF cdf - snd[0] = 0x80 | logchan; - snd[1] = 0xB0; - snd[2] = 0x00; - snd[3] = 0x00; - snd[4] = 0xff; - rescmd = SIM_XchTPDU(&snd[0], 5, &rec[0], snd[4], &recl); - - // read binary EF cdf - snd[0] = 0x80 | logchan; - snd[1] = 0xB0; - snd[2] = 0x00; - snd[3] = 0x00; - snd[4] = 0x00; - rescmd = SIM_XchTPDU(&snd[0], 5, &rec[0], 256, &recl); - - - } - + snd[4] = rescmd; + rescmd = SIM_XchTPDU(&snd[0], 5, &rec[0], snd[4], &recl); + + // read binary EF odf + snd[0] = 0x80 | logchan; + snd[1] = 0xB0; + snd[2] = 0x00; + snd[3] = 0x00; + snd[4] = rec[3]-16; + rescmd = SIM_XchTPDU(&snd[0], 5, &rec[0], snd[4], &recl); + + // Select file EF cdf + snd[0] = 0x80 | logchan; + snd[1] = 0xA4; + snd[2] = 0x00; + snd[3] = 0x00; + snd[4] = 0x02; + snd[5] = 0x51; + snd[6] = 0x03; + rescmd = SIM_XchTPDU(&snd[0], 7, &rec[0], 0, &recl); + + // get response EF odf + snd[0] = logchan; + snd[1] = 0xC0; + snd[2] = 0x00; + snd[3] = 0x00; + snd[4] = rescmd; + rescmd = SIM_XchTPDU(&snd[0], 5, &rec[0], snd[4], &recl); + + // read binary EF cdf + snd[0] = 0x80 | logchan; + snd[1] = 0xB0; + snd[2] = 0x00; + snd[3] = 0x00; + snd[4] = 0xff; + rescmd = SIM_XchTPDU(&snd[0], 5, &rec[0], snd[4], &recl); + + // read binary EF cdf + snd[0] = 0x80 | logchan; + snd[1] = 0xB0; + snd[2] = 0x00; + snd[3] = 0x00; + snd[4] = 0x00; + rescmd = SIM_XchTPDU(&snd[0], 5, &rec[0], 256, &recl); + } #endif - p = &(Sim[0]); p->xbuf[0] = GSM_CLASS; @@ -1847,35 +1817,32 @@ res = SIM_Command(p, llen, result, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"APCMD", 5); - SIM_dbg_write_trace(p->xbuf, llen+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"APANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"APCMD", 5); + SIM_dbg_write_trace(p->xbuf, llen+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"APANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif - #ifdef SIM_APDU_TEST - - // send CLOSE LOGICAL CHANNEL - snd[0] = 0x00; - snd[1] = 0x70; - snd[2] = 0x80; - snd[3] = logchan; - snd[4] = 0x00; - resclose = SIM_XchTPDU(&snd[0], 5, &rec[0], 0, &recl); - + // send CLOSE LOGICAL CHANNEL + snd[0] = 0x00; + snd[1] = 0x70; + snd[2] = 0x80; + snd[3] = logchan; + snd[4] = 0x00; + resclose = SIM_XchTPDU(&snd[0], 5, &rec[0], 0, &recl); #endif return(res); @@ -1887,12 +1854,13 @@ * Search data in a linear fixed or cyclic EF. * return the first record number in which it found the data. */ -SYS_UWORD16 SIM_Seek(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD16 len, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_Seek(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 mode, + SYS_UWORD16 len, SYS_UWORD16 *rcvSize) { SIM_PORT *p; int i; int res; - SYS_UWORD16 llen = len & SIM_UWORD16_MASK; + SYS_UWORD16 llen = len & SIM_UWORD16_MASK; p = &(Sim[0]); @@ -1910,22 +1878,22 @@ res = SIM_Command(p, llen, result, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AQCMD", 5); - SIM_dbg_write_trace(p->xbuf, llen+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AQANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AQCMD", 5); + SIM_dbg_write_trace(p->xbuf, llen+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AQANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); @@ -1936,7 +1904,8 @@ * * Add value to a record of a cyclic EF */ -SYS_UWORD16 SIM_Increase(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_Increase(SYS_UWORD8 *result, SYS_UWORD8 *dat, + SYS_UWORD16 *rcvSize) { SIM_PORT *p; int len; @@ -1961,22 +1930,22 @@ res = SIM_Command(p, len, result, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"ARCMD", 5); - SIM_dbg_write_trace(p->xbuf, 3+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"ARANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"ARCMD", 5); + SIM_dbg_write_trace(p->xbuf, 3+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"ARANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); @@ -1987,12 +1956,13 @@ * * Used by ME to send its toolkit capabilities to SIM */ -SYS_UWORD16 SIM_TerminalProfile(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_TerminalProfile(SYS_UWORD8 *result, SYS_UWORD8 *dat, + SYS_UWORD16 len, SYS_UWORD16 *rcvSize) { SIM_PORT *p; int i; int res; - SYS_UWORD16 llen = len & SIM_UWORD16_MASK; + SYS_UWORD16 llen = len & SIM_UWORD16_MASK; p = &(Sim[0]); @@ -2010,18 +1980,18 @@ res = SIM_Command(p, llen, result, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"ASCMD", 5); - SIM_dbg_write_trace(p->xbuf, llen+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"ASANS", 5); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"ASCMD", 5); + SIM_dbg_write_trace(p->xbuf, llen+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"ASANS", 5); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); @@ -2038,7 +2008,7 @@ SIM_PORT *p; int i; int res; - SYS_UWORD16 llen = len & SIM_UWORD16_MASK; + SYS_UWORD16 llen = len & SIM_UWORD16_MASK; p = &(Sim[0]); @@ -2048,26 +2018,25 @@ p->xbuf[3] = 0; p->xbuf[4] = (SYS_UWORD8)llen; - res = SIM_Command(p, 0, result, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"ATCMD", 5); - SIM_dbg_write_trace(p->xbuf, 5); - SIM_dbg_write_trace((SYS_UWORD8 *)"ATANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"ATCMD", 5); + SIM_dbg_write_trace(p->xbuf, 5); + SIM_dbg_write_trace((SYS_UWORD8 *)"ATANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); @@ -2078,12 +2047,13 @@ * SIM_TerminalResponse * * Used for ME to respond at a SIM toolkit command */ -SYS_UWORD16 SIM_TerminalResponse(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_TerminalResponse(SYS_UWORD8 *result, SYS_UWORD8 *dat, + SYS_UWORD16 len, SYS_UWORD16 *rcvSize) { SIM_PORT *p; int i; int res; - SYS_UWORD16 llen = len & SIM_UWORD16_MASK; + SYS_UWORD16 llen = len & SIM_UWORD16_MASK; p = &(Sim[0]); @@ -2101,18 +2071,18 @@ res = SIM_Command(p, llen, result, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AUCMD", 5); - SIM_dbg_write_trace(p->xbuf, llen+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AUANS", 5); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AUCMD", 5); + SIM_dbg_write_trace(p->xbuf, llen+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AUANS", 5); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); @@ -2122,14 +2092,16 @@ /* * SIM_Envelope * - * Used by Network to tansfert data download to the SIM in a transparent way for user + * Used by Network to tansfert data download to the SIM + * in a transparent way for user */ -SYS_UWORD16 SIM_Envelope(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize) +SYS_UWORD16 SIM_Envelope(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, + SYS_UWORD16 *rcvSize) { SIM_PORT *p; int i; int res; - SYS_UWORD16 llen = len & SIM_UWORD16_MASK; + SYS_UWORD16 llen = len & SIM_UWORD16_MASK; p = &(Sim[0]); @@ -2147,41 +2119,33 @@ res = SIM_Command(p, llen, result, rcvSize); #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AVCMD", 5); - SIM_dbg_write_trace(p->xbuf, llen+5); - SIM_dbg_write_trace((SYS_UWORD8 *)"AVANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AVCMD", 5); + SIM_dbg_write_trace(p->xbuf, llen+5); + SIM_dbg_write_trace((SYS_UWORD8 *)"AVANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); } - - - - - - - - /* * SIM_XchTPDU * * Used for ME to send generic command to WIM Card */ SYS_UWORD16 SIM_XchTPDU(SYS_UWORD8 *dat, SYS_UWORD16 trxLen, SYS_UWORD8 *result, - SYS_UWORD16 rcvLen, SYS_UWORD16 *rcvSize) + SYS_UWORD16 rcvLen, SYS_UWORD16 *rcvSize) { SIM_PORT *p; int i; @@ -2200,43 +2164,36 @@ p->xbuf[i] = dat[i]; } - // enable the WIM behavior of the sim driver - p->apdu_ans_length = rcvLen; + // enable the WIM behavior of the sim driver + p->apdu_ans_length = rcvLen; res = SIM_Command(p, (trxLen - 5), result, rcvSize); - // disable the WIM behavior of the sim driver - p->apdu_ans_length = 0; - + // disable the WIM behavior of the sim driver + p->apdu_ans_length = 0; + #ifdef SIM_DEBUG_TRACE - SIM_dbg_write_trace((SYS_UWORD8 *)"AWCMD", 5); - SIM_dbg_write_trace(p->xbuf, trxLen); - SIM_dbg_write_trace((SYS_UWORD8 *)"AWANS", 5); - SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(result, *rcvSize); - SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); - SIM_dbg_tmp[1] = (SYS_WORD8)res; - SIM_dbg_write_trace(SIM_dbg_tmp, 2); - SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); - if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) - SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; - SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); - SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); - SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace((SYS_UWORD8 *)"AWCMD", 5); + SIM_dbg_write_trace(p->xbuf, trxLen); + SIM_dbg_write_trace((SYS_UWORD8 *)"AWANS", 5); + SIM_dbg_tmp[0] = (SYS_UWORD8)(*rcvSize >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(*rcvSize); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(result, *rcvSize); + SIM_dbg_tmp[0] = (SYS_WORD8)(res>>8); + SIM_dbg_tmp[1] = (SYS_WORD8)res; + SIM_dbg_write_trace(SIM_dbg_tmp, 2); + SIM_dbg_write_trace(SIM_dbg_null, SIM_DBG_NULL); + if (SIM_dbg_tdma_diff > SIM_dbg_max_interchardelay) + SIM_dbg_max_interchardelay = SIM_dbg_tdma_diff; + SIM_dbg_tmp[0] = (SYS_UWORD8)(SIM_dbg_tdma_diff >> 8); + SIM_dbg_tmp[1] = (SYS_UWORD8)(SIM_dbg_tdma_diff); + SIM_dbg_write_trace(SIM_dbg_tmp, 2); #endif return(res); } - - - - - - - /* * Use to detect end of characters reception * input: p pointer on sim structure @@ -2251,7 +2208,6 @@ { SYS_UWORD16 returncode; - //analyse the nature of the command to execute if ( @@ -2292,8 +2248,6 @@ return (0); } - - /* * Use to read file characteristics information * input: p pointer on sim structure @@ -2303,7 +2257,6 @@ * */ - SYS_UWORD8 SIM_GetFileCharacteristics(SIM_PORT *p) { int res; @@ -2313,8 +2266,8 @@ res = SIM_Select(DF_GSM, ubuf, &sz); if ((res & 0xFF00) != 0x9F00) { - res = SIM_Select(DF_DCS1800, ubuf, &sz); - if ((res & 0xFF00) != 0x9F00) + res = SIM_Select(DF_DCS1800, ubuf, &sz); + if ((res & 0xFF00) != 0x9F00) { return (1); } @@ -2345,44 +2298,48 @@ } //interpret Clock stop behavior - // modified by J. Yp-Tcha to integrate all the behaviors required by ETSI. - // 18/11/2002 : TI Chip always allowed low level, high level is hard dependant - - if ((p->FileC & SIM_CLK_STOP_MASK) == SIM_CLK_STOP_NOT_ALLWD) { - /* Sim Clock Stop Not Allowed */ - SIM_sleep_status = SIM_SLEEP_NOT_ALLOWED; - /* There is not need to modifiy p->conf1 */ + // modified by J. Yp-Tcha to integrate all the behaviors required by ETSI. + // 18/11/2002 : TI Chip always allowed low level, + // high level is hard dependant + + if ((p->FileC & SIM_CLK_STOP_MASK) == SIM_CLK_STOP_NOT_ALLWD) { + /* Sim Clock Stop Not Allowed */ + SIM_sleep_status = SIM_SLEEP_NOT_ALLOWED; + /* There is not need to modifiy p->conf1 */ status_os_sim = NU_Delete_Timer (&SIM_timer); + } + else { + if ((p->FileC & SIM_CLK_STOP_MASK) == SIM_CLK_STOP_ALLWD) { + /* Sim Clock Stop Allowed, no prefered level */ + /* Default value for TI Chip shall always be Low Level */ + SIM_sleep_status = SIM_SLEEP_DESACT; + p->c->conf1 = p->conf1 &= ~SIM_CONF1_SCLKLEV; } else { - if ((p->FileC & SIM_CLK_STOP_MASK) == SIM_CLK_STOP_ALLWD) { - /* Sim Clock Stop Allowed, no prefered level */ - /* Default value for TI Chip shall always be Low Level */ - SIM_sleep_status = SIM_SLEEP_DESACT; - p->c->conf1 = p->conf1 &= ~SIM_CONF1_SCLKLEV; - } - else { - /* Clock Stop is allowed, the level shall be checked */ - if ((p->FileC & SIM_CLK_STOP_HIGH) == SIM_CLK_STOP_HIGH) { - /* high level is mandatory */ + /* Clock Stop is allowed, the level shall be checked */ + if ((p->FileC & SIM_CLK_STOP_HIGH) == SIM_CLK_STOP_HIGH) { + /* high level is mandatory */ /* OMEGA/NAUSICA can not handle sim stop clock at high level */ #ifndef ANALOG1 - SIM_sleep_status = SIM_SLEEP_DESACT; + SIM_sleep_status = SIM_SLEEP_DESACT; p->c->conf1 = p->conf1 |= SIM_CONF1_SCLKLEV; #else - /* Sim Clock Stop Not Allowed because the interface do not support this level */ - SIM_sleep_status = SIM_SLEEP_NOT_ALLOWED; - /* There is not need to modifiy p->conf1 */ - status_os_sim = NU_Delete_Timer (&SIM_timer); + /* + * Sim Clock Stop Not Allowed because the interface + * do not support this level + */ + SIM_sleep_status = SIM_SLEEP_NOT_ALLOWED; + /* There is not need to modifiy p->conf1 */ + status_os_sim = NU_Delete_Timer (&SIM_timer); #endif - } - else { - /* by default, Low Level is allowed */ - SIM_sleep_status = SIM_SLEEP_DESACT; - p->c->conf1 = p->conf1 &= ~SIM_CONF1_SCLKLEV; - } - } + } + else { + /* by default, Low Level is allowed */ + SIM_sleep_status = SIM_SLEEP_DESACT; + p->c->conf1 = p->conf1 &= ~SIM_CONF1_SCLKLEV; + } } + } if (SIM_sleep_status == SIM_SLEEP_NONE) { status_os_sim = NU_Delete_Timer (&SIM_timer); @@ -2408,12 +2365,12 @@ SYS_UWORD8 n; SYS_UWORD8 err; - p->xbuf[0] = 0xFF; //character of PTS proc to send + p->xbuf[0] = 0xFF; //character of PTS proc to send p->xbuf[1] = 0; p->xbuf[2] = 0xFF; p->xbuf[3] = 0x7B; - //TA1,TB1,TC1,TD1 present in ATR ? + //TA1,TB1,TC1,TD1 present in ATR ? n = 3; @@ -2422,7 +2379,8 @@ if (p->PTS_Try > 4) { return (SIM_ERR_CARDREJECT); - } // at the fourth attempt, PTS procedure is unusefull. Use default value. + } // at the fourth attempt, + // PTS procedure is unusefull. Use default value. //TA1 present? Test 27.11.2.6 else if ( p->PTS_Try == 4) { @@ -2480,7 +2438,6 @@ return(SIM_ERR_READ); } - if (n == 4) { if (p->rbuf[3] != p->xbuf[3]) @@ -2494,7 +2451,6 @@ SIM_Calcetu (p); return (0); - } /* @@ -2505,12 +2461,10 @@ void SIM_WARMReset (SIM_PORT *p) { - p->c->conf1 = p->conf1 &= ~SIM_CONF1_SRSTLEV; ind_os_sleep (p->etu400); /// wait 400 ETU p->c->conf1 = p->conf1 |= SIM_CONF1_SRSTLEV; p->rx_index = 0; - } @@ -2529,9 +2483,6 @@ status_os_sim = NU_Control_Timer (&SIM_timer, NU_DISABLE_TIMER); } - - - /* * procedure use to get out sleepMode * input p pointer of type SIM_PORT @@ -2547,7 +2498,7 @@ ind_os_sleep (p->startclock); // End WCS patch SIM_sleep_status = SIM_SLEEP_DESACT; - } + } } /* @@ -2560,10 +2511,8 @@ * */ - SYS_UWORD16 SIM_ATRdynamictreatement (SIM_PORT *p, SIM_CARD *cP) { - volatile SYS_UWORD8 HistChar; volatile SYS_UWORD8 InterfChar; SYS_UWORD16 countT; @@ -2600,7 +2549,7 @@ return returncode; } - ind_os_sleep(220); + ind_os_sleep(220); if (((p->rbuf[0] & 0xF0) == 0x30) && (p->rx_index != 0)) { @@ -2642,7 +2591,7 @@ { position_of_TC1 = InterfChar - 1; } - if ((firstprotocol == 0) && ((Tx & 0x20) == mask)) + if ((firstprotocol == 0) && ((Tx & 0x20) == mask)) { position_of_TB1 = InterfChar - 1; } @@ -2657,7 +2606,8 @@ return returncode; } - //need to monitor if TC1 present and if equal to 0 or 255 on first protocol + //need to monitor if TC1 present and if equal to 0 or 255 + // on first protocol if ((firstprotocol == 0) && (position_of_TC1 != 0)) { T = SIM_Translate_atr_char (p->rbuf[position_of_TC1], cP); @@ -2667,7 +2617,8 @@ return (SIM_ERR_CARDREJECT); } } - //need to monitor if TB1 present and if differente from 0 on first protocol + //need to monitor if TB1 present and if differente from 0 + // on first protocol if ((firstprotocol == 0) && (position_of_TB1 != 0)) { T = SIM_Translate_atr_char (p->rbuf[position_of_TB1], cP); @@ -2761,8 +2712,6 @@ return (translated); } - - /* * SIM_Waitforchars is used for waiting nbchar characters from SIM * input p sim port @@ -2771,7 +2720,6 @@ * error code 0 if OK */ - SYS_UWORD16 SIM_Waitforchars (SIM_PORT *p, SYS_UWORD16 max_wait) { volatile SYS_UWORD8 old_nb_char; @@ -2813,7 +2761,7 @@ { countT = 0; old_nb_char = p->rx_index; - //leave while if moderx == 5 + //leave while if moderx == 5 while((p->rx_index < p->expected_data) && (p->moderx != 5)) { ind_os_sleep(1); @@ -2878,16 +2826,13 @@ } p->SWcount = 0; //reset SWcount buffer index when SW1 SW2 received return (0); - } - else //treatement of abnormal case of the asynchronous state machine - { - return (SIM_ERR_ABNORMAL_CASE1); - } - + } + else //treatement of abnormal case of the asynchronous state machine + { + return (SIM_ERR_ABNORMAL_CASE1); + } } - - /* * SIM_Calcetu is used for calculating 9600 etu and 400 etu depending on sim clock freq * and etu period @@ -2932,10 +2877,6 @@ } } - - - - /* * Set the level shifter voltage for start up sequence * @@ -2943,46 +2884,47 @@ SYS_UWORD8 SIM_StartVolt (SYS_UWORD8 ResetFlag) { - SYS_UWORD8 abbmask; - -#if(ANLG_FAM == 1) + SYS_UWORD8 abbmask; + +#if(ANALOG == 1) // we assume that in SIM_TYPE_5V there is nothing to do because it is the reset value #if ((SIM_TYPE == SIM_TYPE_3V) || (SIM_TYPE == SIM_TYPE_3_5V)) // { shut down VCC from ABB and prepare to start at 3V mode - if (ResetFlag) { - abbmask = MODE_INIT_OMEGA_3V; - CurrentVolt = SIM_3V; // we assume the sim is 3v tech. from beginning. - } - else { - if (CurrentVolt == SIM_3V) - abbmask = MODE_INIT_OMEGA_3V; - else - abbmask = MODE5V_OMEGA; - } + if (ResetFlag) { + abbmask = MODE_INIT_OMEGA_3V; + CurrentVolt = SIM_3V; // we assume the sim is 3v tech. from beginning. + } + else { + if (CurrentVolt == SIM_3V) + abbmask = MODE_INIT_OMEGA_3V; + else + abbmask = MODE5V_OMEGA; + } ABB_wa_VRPC ((ABB_Read_Register_on_page(PAGE1,VRPCCTRL1) & 0xC0) | abbmask); ind_os_sleep(1); //wait for charge pump regulation return(SIM_OK); #endif #endif -#if(ANLG_FAM == 2) +#if(ANALOG == 2) SYS_UWORD8 count = 0; // code for Iota // reset value for IOTA is for 1.8V, but specific procedure is needed #if ((SIM_TYPE == SIM_TYPE_1_8V) || (SIM_TYPE == SIM_TYPE_1_8_3V)) // shut down VCC from ABB and prepare to start at 1.8V mode - if (ResetFlag) { - abbmask = MODE_INIT_IOTA_1_8V; - CurrentVolt = SIM_1_8V; // we assume the sim is 1.8v tech. from beginning. - } - else { - if (CurrentVolt == SIM_1_8V) - abbmask = MODE_INIT_IOTA_1_8V; - else - abbmask = MODE_INIT_IOTA_3V; - } + if (ResetFlag) { + abbmask = MODE_INIT_IOTA_1_8V; + // we assume the sim is 1.8v tech. from beginning. + CurrentVolt = SIM_1_8V; + } + else { + if (CurrentVolt == SIM_1_8V) + abbmask = MODE_INIT_IOTA_1_8V; + else + abbmask = MODE_INIT_IOTA_3V; + } ABB_wa_VRPC ((ABB_Read_Register_on_page(PAGE1,VRPCSIM) & 0xF4) | abbmask); while(count++ < 5) { - if (ABB_Read_Register_on_page(PAGE1,VRPCSIM) & 0x04) // test RSIMRSU + if (ABB_Read_Register_on_page(PAGE1,VRPCSIM) & 0x04) // test RSIMRSU return(SIM_OK); ind_os_sleep(1); } @@ -2991,12 +2933,12 @@ #endif // 3V only #if (SIM_TYPE == SIM_TYPE_3V) - abbmask = MODE_INIT_IOTA_3V; - CurrentVolt = SIM_3V; // we assume the sim is 3v tech. from beginning. + abbmask = MODE_INIT_IOTA_3V; + CurrentVolt = SIM_3V; // we assume the sim is 3v tech. from beginning. ABB_wa_VRPC ((ABB_Read_Register_on_page(PAGE1,VRPCSIM) & 0xF4) | abbmask); while(count++ < 5) { - if (ABB_Read_Register_on_page(PAGE1,VRPCSIM) & 0x04) // test RSIMRSU + if (ABB_Read_Register_on_page(PAGE1,VRPCSIM) & 0x04) // test RSIMRSU return(SIM_OK); ind_os_sleep(1); } @@ -3005,25 +2947,26 @@ #endif #endif -#if(ANLG_FAM == 3) +#if(ANALOG == 3) SYS_UWORD8 count = 0; // code for Syren // reset value for SYREN is for 1.8V, but specific procedure is needed #if ((SIM_TYPE == SIM_TYPE_1_8V) || (SIM_TYPE == SIM_TYPE_1_8_3V)) // { shut down VCC from ABB and prepare to start at 1.8V mode - if (ResetFlag) { - abbmask = MODE_INIT_SYREN_1_8V; - CurrentVolt = SIM_1_8V; // we assume the sim is 1.8v tech. from beginning. - } - else { - if (CurrentVolt == SIM_1_8V) - abbmask = MODE_INIT_SYREN_1_8V; - else - abbmask = MODE_INIT_SYREN_3V; - } - ABB_wa_VRPC ((ABB_Read_Register_on_page(PAGE1,VRPCSIMR) & 0x1F4) | abbmask); + if (ResetFlag) { + abbmask = MODE_INIT_SYREN_1_8V; + // we assume the sim is 1.8v tech. from beginning. + CurrentVolt = SIM_1_8V; + } + else { + if (CurrentVolt == SIM_1_8V) + abbmask = MODE_INIT_SYREN_1_8V; + else + abbmask = MODE_INIT_SYREN_3V; + } + ABB_wa_VRPC ((ABB_Read_Register_on_page(PAGE1,VRPCSIMR) & 0x1F4) | abbmask); while(count++ < 5) { - if (ABB_Read_Register_on_page(PAGE1,VRPCSIMR) & 0x04) // test RSIMRSU + if (ABB_Read_Register_on_page(PAGE1,VRPCSIMR) & 0x04) // test RSIMRSU return(SIM_OK); ind_os_sleep(1); } @@ -3033,8 +2976,8 @@ // 3V only #if (SIM_TYPE == SIM_TYPE_3V) - abbmask = MODE_INIT_SYREN_3V; - CurrentVolt = SIM_3V; // we assume the sim is 3v tech. from beginning. + abbmask = MODE_INIT_SYREN_3V; + CurrentVolt = SIM_3V; // we assume the sim is 3v tech. from beginning. ABB_wa_VRPC ((ABB_Read_Register_on_page(PAGE1,VRPCSIMR) & 0x1F4) | abbmask); while(count++ < 5) { @@ -3054,19 +2997,18 @@ * */ - SYS_UWORD8 SIM_SwitchVolt (SYS_UWORD8 ResetFlag) { SYS_UWORD8 count = 0; - SYS_UWORD8 abbmask; - + SYS_UWORD8 abbmask; + SIM_PowerOff(); - #if(ANLG_FAM == 1) + #if(ANALOG == 1) #if (SIM_TYPE == SIM_TYPE_3_5V) // shut down VCC from ABB and prepare to start at 5V mode if (ResetFlag) { abbmask = MODE5V_OMEGA; - CurrentVolt = SIM_5V; + CurrentVolt = SIM_5V; } else { if (CurrentVolt == SIM_3V) @@ -3077,11 +3019,11 @@ ABB_wa_VRPC ((ABB_Read_Register_on_page(PAGE1,VRPCCTRL1) & 0xC0) | abbmask); return(SIM_OK); #endif - #elif(ANLG_FAM == 2) + #elif(ANALOG == 2) #if (SIM_TYPE == SIM_TYPE_1_8_3V) // shut down VCC from ABB and prepare to start at 3V mode if (ResetFlag) { abbmask = MODE_INIT_IOTA_3V; - CurrentVolt = SIM_3V; + CurrentVolt = SIM_3V; } else { if (CurrentVolt == SIM_1_8V) @@ -3099,11 +3041,11 @@ // IOTA failure activation return(SIM_ERR_HARDWARE_FAIL); #endif - #elif(ANLG_FAM == 3) + #elif(ANALOG == 3) #if (SIM_TYPE == SIM_TYPE_1_8_3V) // shut down VCC from ABB and prepare to start at 3V mode if (ResetFlag) { abbmask = MODE_INIT_SYREN_3V; - CurrentVolt = SIM_3V; + CurrentVolt = SIM_3V; } else { if (CurrentVolt == SIM_1_8V) @@ -3118,35 +3060,31 @@ return(SIM_OK); ind_os_sleep(1); } - // SYREN failure activation - return(SIM_ERR_HARDWARE_FAIL); + // SYREN failure activation + return(SIM_ERR_HARDWARE_FAIL); #endif - #endif // ANLG_FAM == 1, 2, 3 - + #endif // ANALOG == 1, 2, 3 } - - -SYS_UWORD8 SIM_Memcpy(SYS_UWORD8 *Buff_target, SYS_UWORD8 Buff_source[], SYS_UWORD16 len) +SYS_UWORD8 SIM_Memcpy(SYS_UWORD8 *Buff_target, SYS_UWORD8 Buff_source[], + SYS_UWORD16 len) { SYS_UWORD16 i; //unsigned short type counter chosen for copy of 256 bytes for (i = 0; i < len; i++) - { + { if (i == RSIMBUFSIZE) - { + { return (SIM_ERR_BUFF_OVERFL); - } - else - { + } + else + { (*(Buff_target+i)) = Buff_source[i]; - } + } } return (0); } - - /* * SIM_SleepStatus * @@ -3155,15 +3093,13 @@ */ SYS_BOOL SIM_SleepStatus(void) { - if ((SIM_sleep_status == SIM_SLEEP_ACT) || (SIM_sleep_status == SIM_SLEEP_NONE)) + if ((SIM_sleep_status == SIM_SLEEP_ACT) || + (SIM_sleep_status == SIM_SLEEP_NONE)) return(1); // SIM is ready for deep sleep else return(0); } - - - /* * Special lock function to force SIM entity to use adequat SIM Driver */ @@ -3181,7 +3117,3 @@ } } #endif - - - -