--- a/gsm-fw/L1/cfile/l1_drive.c	Sun Aug 03 07:07:24 2014 +0000
+++ b/gsm-fw/L1/cfile/l1_drive.c	Sun Aug 03 16:13:52 2014 +0000
@@ -196,7 +196,7 @@
 void   l1dmacro_adc_read_rx (void);
 
 void Cust_get_ramp_tab(API *a_ramp, UWORD8 txpwr_ramp_up, UWORD8 txpwr_ramp_down, UWORD16 radio_freq);
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (RF_FAM == 61))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3) || (RF_FAM == 61))
   UWORD16 Cust_get_pwr_data(UWORD8 txpwr, UWORD16 radio_freq
   										  #if(REL99 && FF_PRF)
   										  ,UWORD8 number_uplink_timeslot
@@ -380,7 +380,7 @@
 #endif
     //######################## For DSP Rom #################################
     l1s_dsp_com.dsp_db_w_ptr->d_afc = afc;                      // Write new afc command.
-    #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (RF_FAM == 61))
+    #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3) || (RF_FAM == 61))
     // NOTE: In Locosto AFC loading is w.r.t DRP not in ABB
       l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= (1 << B_AFC);     // Validate new afc value.
     #endif
@@ -422,7 +422,7 @@
 /*-------------------------------------------------------*/
 void l1ddsp_load_txpwr(UWORD8 txpwr, UWORD16 radio_freq)
 {
-  #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (RF_FAM == 61))
+  #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3) || (RF_FAM == 61))
     UWORD16 pwr_data;
   #endif
 
@@ -445,7 +445,7 @@
 	   #endif
     #endif
 
-    #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+    #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
       l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL) | (1 << B_BULRAMPDEL2));
     #endif
 
@@ -487,7 +487,7 @@
     if(txpwr == NO_TXPWR)
     {
        /*** No transmit ***/
-       #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+       #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
          l1s_dsp_com.dsp_db_w_ptr->d_power_ctl = 0x12; // AUXAPC initialization addr 9 pg 0 Omega
          l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL)  | (1 << B_BULRAMPDEL2));
        #endif
@@ -510,7 +510,7 @@
       									  );
 
       /*** Load power control level adding the APC address register ***/
-      #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+      #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
         l1s_dsp_com.dsp_db_w_ptr->d_power_ctl = ((pwr_data << 6) | 0x12);
         // AUXAPC initialization addr 9 pg 0 Omega
       #endif
@@ -540,7 +540,7 @@
 		    #endif
           #endif
 
-          #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+          #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
 	    // Setting bit 3 of this register causes DSP to write to APCDEL1 register in Omega. However,
             // we are controlling this register from MCU through the SPI. Therefore, set it to 0.
             l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (0 << B_BULRAMPDEL)  | (1 << B_BULRAMPDEL2));
@@ -574,7 +574,7 @@
 	   #endif
       #endif
 
-      #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) ||(RF_FAM == 61))
+      #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3) ||(RF_FAM == 61))
         l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL)  | (1 << B_BULRAMPDEL2));
       #endif
     }
@@ -1246,7 +1246,7 @@
     if (win_id == 0)
   #endif
   {
-    #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+    #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
     // NOTE: In Locosto AFC is in DRP not in triton
         l1ddsp_load_afc(l1s.afc);
     #endif
@@ -1597,7 +1597,7 @@
   l1dmacro_rx_nb   (radio_freq, csf_filter_choice); // RX window for NB.
  #endif
 
-  #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+  #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
       l1ddsp_load_afc(l1s.afc);
   #endif
   #if (RF_FAM == 61)