--- a/gsm-fw/L1/cfile/l1_init.c	Sun Aug 03 07:07:24 2014 +0000
+++ b/gsm-fw/L1/cfile/l1_init.c	Sun Aug 03 16:13:52 2014 +0000
@@ -99,7 +99,7 @@
 
   #include "spi_drv.h"
   #include "abb.h"
-  #if (ANLG_FAM != 11)
+  #if (ANALOG != 11)
   #include "abb_core_inth.h"
   #endif
 
@@ -196,7 +196,7 @@
   #include <string.h>
   #include <stdio.h>
 
-#if (ANLG_FAM == 11)
+#if (ANALOG == 11)
   #include "bspTwl3029_I2c.h"
   #include "bspTwl3029_Aud_Map.h"
   #include "bspTwl3029_Madc.h"
@@ -205,7 +205,7 @@
 #include "l1_drp_if.h"
 #include "drp_main.h" 
 //
-#if (ANLG_FAM == 11)
+#if (ANALOG == 11)
 #if (L1_MADC_ON == 1)
 extern BspTwl3029_MadcResults l1_madc_results;
 extern void l1a_madc_callback(void);
@@ -379,14 +379,14 @@
     l1s_dsp_com.dsp_ndb_ptr->a_fd[2]          = 0xffff;        // NERR = 0xffff
     l1s_dsp_com.dsp_ndb_ptr->d_a5mode         = 0;
 
-    #if ((ANLG_FAM == 1) || (ANLG_FAM == 2)  || (ANLG_FAM == 3) || (ANLG_FAM == 11))
+    #if ((ANALOG == 1) || (ANALOG == 2)  || (ANALOG == 3) || (ANALOG == 11))
       l1s_dsp_com.dsp_ndb_ptr->d_tch_mode     = 0x0800;  // Analog base band selected = Nausica, Iota, Syren (bit 11)
     #endif
 
-    #if ((ANLG_FAM == 1) || (ANLG_FAM == 2)  || (ANLG_FAM == 3))
+    #if ((ANALOG == 1) || (ANALOG == 2)  || (ANALOG == 3))
       l1s_dsp_com.dsp_ndb_ptr->d_tch_mode    |= (((l1_config.params.guard_bits - 4) & 0x000F) << 7); //Bit 7..10: guard bits
     #endif
-    #if (ANLG_FAM == 11)
+    #if (ANALOG == 11)
       l1s_dsp_com.dsp_ndb_ptr->d_tch_mode    |= (((l1_config.params.guard_bits) & 0x000F) << 7); //Bit 7..10: guard bits
     #endif
 
@@ -760,7 +760,7 @@
   #endif
 
 
-    #if (ANLG_FAM == 1)
+    #if (ANALOG == 1)
       // Omega registers values will be programmed at 1st DSP communication interrupt
 
       dsp_ndb_ptr->d_debug1      = l1_config.params.debug1;      // Enable f_tx delay of 400000 cyc DEBUG
@@ -786,7 +786,7 @@
         dsp_ndb_ptr->d_apcdel2     = 0x0000;
       #endif
     #endif
-    #if (ANLG_FAM == 2)
+    #if (ANALOG == 2)
       // Iota registers values will be programmed at 1st DSP communication interrupt
 
       dsp_ndb_ptr->d_debug1      = l1_config.params.debug1;      // Enable f_tx delay of 400000 cyc DEBUG
@@ -807,7 +807,7 @@
       dsp_ndb_ptr->d_apcdel1     =l1_config.params.apcdel1;
       dsp_ndb_ptr->d_apcdel2     = l1_config.params.apcdel2;
     #endif
-    #if (ANLG_FAM == 3)
+    #if (ANALOG == 3)
       // Syren registers values will be programmed at 1st DSP communication interrupt
 
       dsp_ndb_ptr->d_debug1      = l1_config.params.debug1;      // Enable f_tx delay of 400000 cyc DEBUG
@@ -842,7 +842,7 @@
 
     #endif
 
-    #if (ANLG_FAM == 11)
+    #if (ANALOG == 11)
 // The following settings need to be done only in L1 StandALoen as PSP would
 // do in the case of full PS Build...