diff gsm-fw/L1/include/l1_defty.h @ 520:ed6071292a5c

L1: first C module compiles: ind_os.c
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Thu, 10 Jul 2014 15:49:38 +0000
parents afceeeb2cba1
children 25a7fe25864c
line wrap: on
line diff
--- a/gsm-fw/L1/include/l1_defty.h	Thu Jul 10 15:02:48 2014 +0000
+++ b/gsm-fw/L1/include/l1_defty.h	Thu Jul 10 15:49:38 2014 +0000
@@ -7,7 +7,7 @@
  *
  ************* Revision Controle System Header *************/
 #if(L1_DYN_DSP_DWNLD == 1)
-  #include "l1_dyn_dwl_defty.h"
+  #include "../dyn_dwl_include/l1_dyn_dwl_defty.h"
 #endif
 
 typedef struct
@@ -421,7 +421,7 @@
                              //        bit [12.13] -> b_tch_loop,     tch loops A/B/C.
   API hole;               // (10) unused hole.
 
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
   API d_ctrl_abb;         // (11) Bit field indicating the analog baseband register to send.
                              //        bit [0]     -> b_ramp: the ramp information(a_ramp[]) is located in NDB
                              //        bit [1.2]   -> unused
@@ -552,9 +552,9 @@
     API d_dai_onoff;
     API d_auxdac;
 
-  #if (ANLG_FAM == 1)
+  #if (ANALOG == 1)
     API d_vbctrl;
-  #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
+  #elif ((ANALOG == 2) || (ANALOG == 3))
     API d_vbctrl1;
   #endif
   
@@ -660,7 +660,7 @@
     API d_gea_mode_ovly;
     API a_gea_kc_ovly[4];
 
-#if (ANLG_FAM == 3)
+#if (ANALOG == 3)
     // SYREN specific registers
     API d_vbpop;
     API d_vau_delay_init;
@@ -669,7 +669,7 @@
     API d_vaus_vol;
     API d_vaud_pll;
     API d_hole3_ndb[1];
-#elif ((ANLG_FAM == 1) || (ANLG_FAM == 2))
+#elif ((ANALOG == 1) || (ANALOG == 2))
 
     API d_hole3_ndb[7];
 
@@ -896,9 +896,9 @@
     API d_dai_onoff;
     API d_auxdac;
 
-  #if (ANLG_FAM == 1)
+  #if (ANALOG == 1)
     API d_vbctrl;
-  #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
+  #elif ((ANALOG == 2) || (ANALOG == 3))
     API d_vbctrl1;
   #endif
 
@@ -1157,7 +1157,7 @@
                             //   bit [2]     -> b_dtx.
 
   // OMEGA...........................(MCU -> DSP).
-  #if ((ANLG_FAM == 1) || (ANLG_FAM == 2))
+  #if ((ANALOG == 1) || (ANALOG == 2))
     API a_ramp[16];
     #if (MELODY_E1)
       API d_melo_osc_used;
@@ -1215,9 +1215,9 @@
     API d_dai_onoff;
     API d_auxdac;
 
-    #if (ANLG_FAM == 1)
+    #if (ANALOG == 1)
       API d_vbctrl;
-    #elif (ANLG_FAM == 2)
+    #elif (ANALOG == 2)
       API d_vbctrl1;
     #endif
 
@@ -1387,7 +1387,7 @@
 
   // OMEGA...........................(MCU -> DSP).
 
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2))
+#if ((ANALOG == 1) || (ANALOG == 2))
   API a_ramp[16];
   #if (MELODY_E1)
     API d_melo_osc_used;
@@ -1443,9 +1443,9 @@
   API d_bulqoff;
   API d_dai_onoff;
   API d_auxdac;
-  #if (ANLG_FAM == 1)
+  #if (ANALOG == 1)
     API d_vbctrl;
-  #elif (ANLG_FAM == 2)
+  #elif (ANALOG == 2)
     API d_vbctrl1;
   #endif
   API d_bbctrl;
@@ -2834,7 +2834,7 @@
     BOOL     dco_enabled;
   #endif
 
-  #if (ANLG_FAM == 1)
+  #if (ANALOG == 1)
     UWORD16 debug1;
     UWORD16 afcctladd;
     UWORD16 vbuctrl;
@@ -2848,7 +2848,7 @@
     UWORD16 vbctrl;
     UWORD16 apcdel1;
   #endif
-  #if (ANLG_FAM == 2)
+  #if (ANALOG == 2)
     UWORD16 debug1;
     UWORD16 afcctladd;
     UWORD16 vbuctrl;
@@ -2865,7 +2865,7 @@
     UWORD16 apcdel1;
     UWORD16 apcdel2;
   #endif
-  #if (ANLG_FAM == 3)
+  #if (ANALOG == 3)
     UWORD16 debug1;
     UWORD16 afcctladd;
     UWORD16 vbuctrl;