/*
 * This assembly module, which puts bits of code into several different
 * sections, contains those essential entry point etc bits which are common
 * to both the regular flashable build and the fc-xram development build.
 */

	.section	iram.vectors,"ax",%progbits
	.code	32
/* ARM exceptions */
	b	_arm_undefined
	b	_arm_swi
	b	_arm_abort_prefetch
	b	_arm_abort_data
	b	_arm_reserved
/* IRQ */
	b	_INT_IRQ
/* FIQ */
	b	_INT_FIQ

	.section	xip.text,"ax",%progbits
	.code	32
	.globl	_FlashorXram_entry
_FlashorXram_entry:
/* first order of business: copy iram.text to where it's supposed to be */
	ldr	r8, =__iramtext_flash_addr
	ldr	r9, =__iramtext_ram_addr
	ldr	r10, =__iramtext_size
1:	ldmia	r8!, {r0-r7}
	stmia	r9!, {r0-r7}
	subs	r10, r10, #0x20
	bhi	1b
/* enable Calypso boot ROM for the ARM exception and IRQ/FIQ vectors */
	ldr	r1, =0xFFFFFB10
	mov	r2, #0x0100
	strh	r2, [r1]
/* now we can call any function w/o worry as to where it lives */
/* clear int.bss and ext.bss, using bzero() from libc */
	ldr	r0, =__intbss_start
	ldr	r1, =__intbss_size
	bl	bzero
	ldr	r0, =__extbss_start
	ldr	r1, =__extbss_size
	bl	bzero
/* we can start Nucleus now! */
	b	INT_Initialize

/*
 * riviera/support/exception.c references exit()
 * The following kludge will allow us to pass the link for the time being
 * until we can find a better solution, such as hooking into DAR maybe.
 */

	.globl	exit
exit:
	b	.