FreeCalypso > hg > freecalypso-sw
view gsm-fw/L1/cfile/l1_small_asm.S @ 884:353daaa6014d
gsm-fw/gpf/conf/gsmcomp.c: increased max partition in the voice-only config
The code we got from TCS211 had the maximum prim pool partition size set to
900 bytes in the voice-only config (no FAX_AND_DATA, no GPRS) and to 1600 bytes
in every other config. As it turns out, this "minimized" config breaks when
the AT command interface is used with %CPI enabled, as the responsible code in
ATI does an ACI_MALLOC of 1012 bytes. TI may have considered this case to be
unsupported usage (perhaps they didn't care about the combination of a
voice-only PS with AT command control), but we do want this use case to work
without crashing. Solution: I made the largest prim pool the same as it is
with FAX_AND_DATA: 3 partitions of 1600 bytes.
| author | Space Falcon <falcon@ivan.Harhan.ORG> |
|---|---|
| date | Sat, 27 Jun 2015 07:31:30 +0000 |
| parents | 8d6062f4e7e4 |
| children |
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/* * Assembly code extracted out of TI's l1_small.c * * This code is correct ONLY for CHIPSET 10 or 11 as currently used * by FreeCalypso; see TI's original code for what changes would be * needed to support other CHIPSETs. */ .text .code 32 /*-------------------------------------------------------*/ /* _GSM_Small_Sleep */ /* (formerly INT_Small_Sleep) */ /*-------------------------------------------------------*/ /* */ /* Description: small sleep */ /* ------------ */ /* Called by TCT_Schedule main loop of Nucleus */ /*-------------------------------------------------------*/ #define SMALL_SLEEP 0x01 #define ALL_SLEEP 0x04 #define PWR_MNGT 0x01 .globl _GSM_Small_Sleep _GSM_Small_Sleep: ldr r0,Switch ldr r0,[r0] ldrb r1,[r0] cmp r1,#PWR_MNGT bne TCT_Schedule_Loop ldr r0,Mode ldr r0,[r0] ldrb r1,[r0] cmp r1,#SMALL_SLEEP beq Small_sleep_ok cmp r1,#ALL_SLEEP bne TCT_Schedule_Loop Small_sleep_ok: // ***************************************************** //reset the DEEP_SLEEP bit 12 of CNTL_ARM_CLK register // (Cf BUG_1278) ldr r0,addrCLKM @ pick up CNTL_ARM_CLK register address ldrh r1,[r0] @ take the current value of the register orr r1,r1,#0x1000 @ reset the bit strh r1,[r0] @ store the result ldr r0,addrCLKM @ pick up CLKM clock register address ldrh r1,[r0] @ take the current value of the register bic r1,r1,#1 @ disable ARM clock strh r1,[r0] B TCT_Schedule_Loop @ Return to TCT_Schedule main loop addrCLKM: .word 0xfffffd00 @ CLKM clock register address Mode: .word mode_authorized Switch: .word switch_PWR_MNGT