view target-utils/pirexplore/main.c @ 911:42719fa3e6af

etmsync: memory read implemented
author Space Falcon <falcon@ivan.Harhan.ORG>
date Tue, 08 Sep 2015 07:52:29 +0000
parents fcbe1332b197
children a7b0b426f9ca
line wrap: on
line source

#include "types.h"
#include "romvars.h"

extern struct boot_rom_vars rom_vars;

extern char *uart_name;

main()
{
	uart_select_init();
	printf("Pirelli hardware exploration utility running\n");
	printf("Loaded via UART %d (%s) at baud rate #%d\n", rom_vars.uart_id,
		uart_name, rom_vars.baud_rate_code);
	printf("TCXO clock input autodetected to be %d MHz\n",
		rom_vars.clktcxo_13mhz ? 13 : 26);
	/*
	 * Make the same register settings as in the init script used by
	 * fc-loadtool and fc-xram: ../../loadtools/scripts/pirelli.init
	 */
	*(volatile u16 *)0xfffffb00 = 0x00A4;
	*(volatile u16 *)0xfffffb02 = 0x00A4;
	*(volatile u16 *)0xfffffb06 = 0x00A4;
	*(volatile u16 *)0xfffef006 = 0x0008;
	/*
	 * Other register settings replicating what OsmocomBB does
	 * in board/pirelli_dpl10/init.c
	 */
	*(volatile u16 *)0xfffef008 = 0x7090;
	*(volatile u16 *)0xfffef00a = 0x021F;
	*(volatile u16 *)0xfffe4804 = 0xFF6D;
	*(volatile u16 *)0xfffe4802 = 0x0000;
	/* nCS4 setup for SPCA552E */
	*(volatile u16 *)0xfffffb0a = 0x00A7;
	/* initialize PWL registers like OsmocomBB does */
	*(volatile u8 *)0xfffe8000 = 0x32;
	*(volatile u8 *)0xfffe8001 = 0x01;
	for (;;) {
		putchar('=');
		if (command_entry())
			command_dispatch();
	}
}