FreeCalypso > hg > freecalypso-sw
view target-utils/pirexplore/main.c @ 382:a2210b0361c1
loadtools: implemented compal-stage setting in hw parameter files
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Mon, 09 Jun 2014 21:53:12 +0000 |
parents | fcbe1332b197 |
children | a7b0b426f9ca |
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#include "types.h" #include "romvars.h" extern struct boot_rom_vars rom_vars; extern char *uart_name; main() { uart_select_init(); printf("Pirelli hardware exploration utility running\n"); printf("Loaded via UART %d (%s) at baud rate #%d\n", rom_vars.uart_id, uart_name, rom_vars.baud_rate_code); printf("TCXO clock input autodetected to be %d MHz\n", rom_vars.clktcxo_13mhz ? 13 : 26); /* * Make the same register settings as in the init script used by * fc-loadtool and fc-xram: ../../loadtools/scripts/pirelli.init */ *(volatile u16 *)0xfffffb00 = 0x00A4; *(volatile u16 *)0xfffffb02 = 0x00A4; *(volatile u16 *)0xfffffb06 = 0x00A4; *(volatile u16 *)0xfffef006 = 0x0008; /* * Other register settings replicating what OsmocomBB does * in board/pirelli_dpl10/init.c */ *(volatile u16 *)0xfffef008 = 0x7090; *(volatile u16 *)0xfffef00a = 0x021F; *(volatile u16 *)0xfffe4804 = 0xFF6D; *(volatile u16 *)0xfffe4802 = 0x0000; /* nCS4 setup for SPCA552E */ *(volatile u16 *)0xfffffb0a = 0x00A7; /* initialize PWL registers like OsmocomBB does */ *(volatile u8 *)0xfffe8000 = 0x32; *(volatile u8 *)0xfffe8001 = 0x01; for (;;) { putchar('='); if (command_entry()) command_dispatch(); } }