# HG changeset patch
# User Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
# Date 1407727039 0
# Node ID 8fe8cae8cf929897f0311b8c732e2a2813485a63
# Parent  976aeaa2e6e1eb26ad397311d43ccd67e217d181
L1: l1_trace.c compiles

diff -r 976aeaa2e6e1 -r 8fe8cae8cf92 gsm-fw/L1/cfile/Makefile
--- a/gsm-fw/L1/cfile/Makefile	Mon Aug 11 01:46:50 2014 +0000
+++ b/gsm-fw/L1/cfile/Makefile	Mon Aug 11 03:17:19 2014 +0000
@@ -10,7 +10,7 @@
 IOBJS=	l1_api_hisr.o l1_cmplx_intram.o l1_ctl.o l1_drive.o l1_func.o \
 	l1_mfmgr.o l1_small_asm.o l1_sync_intram.o
 XOBJS=	l1_afunc.o l1_async.o l1_cmplx.o l1_init.o l1_pwmgr.o l1_small_defs.o \
-	l1_sync.o
+	l1_sync.o l1_trace.o
 
 all:	${IOBJS} ${XOBJS}
 
diff -r 976aeaa2e6e1 -r 8fe8cae8cf92 gsm-fw/L1/cfile/l1_trace.c
--- a/gsm-fw/L1/cfile/l1_trace.c	Mon Aug 11 01:46:50 2014 +0000
+++ b/gsm-fw/L1/cfile/l1_trace.c	Mon Aug 11 03:17:19 2014 +0000
@@ -13,8 +13,8 @@
 
 #include "config.h"
 
-//omaps00090550 #include "l1_macro.h"
 #include "l1_confg.h"
+#include "l1_macro.h"
 
 #include <string.h>
 #include "l1_types.h"
@@ -105,6 +105,8 @@
 #include <stdio.h>
 
 #include "../../serial/serialswitch.h"
+#include "../../riviera/rv/rv_trace.h"
+#include "../../riviera/rvf/rvf_api.h"
 
 //void dt_trace_event(UWORD16 id, char *fmt_string, ...);
 #if (TRACE_TYPE==7)
@@ -4886,7 +4888,7 @@
         #else
           ((T_TR_L1_TEST_HW_INFO *)(ptr))->mcu_gprs_version  = 0;
         #endif
-        #if ((((CHIPSET !=2 )) && ((LONG_JUMP != 0))) || (CHIPSET == 12) || (CHIPSET == 15))
+        #if 0 //((((CHIPSET !=2 )) && ((LONG_JUMP != 0))) || (CHIPSET == 12) || (CHIPSET == 15))
           ((T_TR_L1_TEST_HW_INFO *)(ptr))->d_checksum1       = d_checksum1;
           ((T_TR_L1_TEST_HW_INFO *)(ptr))->d_checksum2       = d_checksum2;
         #else
@@ -5780,6 +5782,7 @@
 } /* end of Trace_L1S_CPU_load() */
 
 /********** DSP CPU load measurement *************/
+#if (DSP >= 38)
 void l1_dsp_cpu_load_read()
 {
 
@@ -5857,6 +5860,7 @@
     }
   }
 } /* end of l1_dsp_cpu_load_read() */
+#endif	// DSP >= 38
 
 #endif
 
@@ -14430,7 +14434,7 @@
                 ((T_TST_TEST_HW_CON*)(msg->SigP))->dsp_patch_version,
                 ((T_TST_TEST_HW_CON*)(msg->SigP))->dsp_checksum);
 
-      #if ((((CHIPSET !=2 )) && ((LONG_JUMP != 0))) || (CHIPSET == 12) || (CHIPSET == 15))
+      #if 0 //((((CHIPSET !=2 )) && ((LONG_JUMP != 0))) || (CHIPSET == 12) || (CHIPSET == 15))
       {
         sprintf(str2,"CHECKSUM before DWNL:%04x\n\r",d_checksum1);
         strcat(str,str2);
@@ -15811,6 +15815,7 @@
 } /* end of Trace_L1S_CPU_load() */
 
 /********** DSP CPU load measurement *************/
+#if (DSP >= 38)
 void l1_dsp_cpu_load_read()
 {
 
@@ -15888,6 +15893,7 @@
     }
   }
 } /* end of l1_dsp_cpu_load_read() */
+#endif	// DSP >= 38
 
     #endif //((TRACE_TYPE == 1) && (CODE_VERSION != SIMULATION))
   #endif // (TRACE_TYPE == 1) // (TRACE_TYPE == 4)