# HG changeset patch # User Michael Spacefalcon # Date 1402990405 0 # Node ID c2e14cc15c236417f778cbc71681f863a75e022e # Parent b2487cfd68fd8df6b7a5ce54bebae28b29207ac3 flash erase-program-boot: implemented CRC check before flashing diff -r b2487cfd68fd -r c2e14cc15c23 loadtools/flcmplboot.c --- a/loadtools/flcmplboot.c Tue Jun 17 06:31:27 2014 +0000 +++ b/loadtools/flcmplboot.c Tue Jun 17 07:33:25 2014 +0000 @@ -16,6 +16,8 @@ extern struct flash_bank_info flash_bank_info[2]; extern struct flash_cmdset flash_cmdset_intel; +extern uint32_t crc32_table[]; + static int hack_enabled; static uint32_t boot_sector_size; static uint32_t ram_buffer_addr; @@ -123,8 +125,9 @@ char *targv[5], longarg[513]; char shortarg1[9], shortarg2[9], shortarg3[9]; u_char databuf[256]; - int reclen, cc; - uint32_t ramaddr, remlen; + int reclen, cc, i; + uint32_t ramaddr, remlen, crcaccum; + u_long crc_from_target; if (!hack_enabled) { fprintf(stderr, @@ -192,6 +195,7 @@ targv[1] = longarg; targv[2] = 0; ramaddr = ram_buffer_addr; + crcaccum = 0xFFFFFFFF; for (remlen = len; remlen; remlen -= reclen) { if (remlen >= 250) reclen = 250; @@ -203,6 +207,9 @@ fprintf(stderr, "error reading from %s\n", argv[2]); return(-1); } + for (i = 0; i < reclen; i++) /* update running CRC */ + crcaccum = crc32_table[crcaccum & 0xFF ^ databuf[i+5]] + ^ (crcaccum >> 8); make_s3_record(databuf, ramaddr, reclen); make_ml_arg(databuf, longarg); tpinterf_make_cmd(targv); @@ -222,6 +229,17 @@ putchar('\n'); fclose(binf); + printf("Verifying CRC-32 in target RAM\n"); + if (crc32_on_target((u_long) ram_buffer_addr, (u_long) len, + &crc_from_target) < 0) + return(-1); + if (crc_from_target == crcaccum) + printf("match (%08lX)\n", crc_from_target); + else { + fprintf(stderr, "error: CRC mismatch!\n"); + return(-1); + } + printf("Commanding flash erase+program operation on the target\n"); sprintf(shortarg1, "%lx", (u_long) ram_buffer_addr); sprintf(shortarg2, "%lx", (u_long) flash_bank_info[0].base_addr);