FreeCalypso > hg > freecalypso-sw
changeset 383:326363ba5bf4
loadtools: compal.config and compal.init created
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
---|---|
date | Tue, 10 Jun 2014 07:37:29 +0000 |
parents | a2210b0361c1 |
children | 7ef814efbebe |
files | loadtools/scripts/compal.config loadtools/scripts/compal.init |
diffstat | 2 files changed, 43 insertions(+), 0 deletions(-) [+] |
line wrap: on
line diff
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/loadtools/scripts/compal.config Tue Jun 10 07:37:29 2014 +0000 @@ -0,0 +1,27 @@ +# This configuration is intended to be applicable to all of C11x, C123, +# C139 and C140. The "plain" version of compalstage selected below +# should work for all C11x/123; it will also work on C139/140 phones +# that had the simpler boot code flashed into them, as will be used for +# FreeCalypso. When running loadtools with this config on C139/140 +# phones that still have the "official" fw in them, one will need to +# specify -h compal -c 1003 to use the inefficient ~15 KiB version of +# compalstage. + +compal-stage plain + +# Whether we are breaking in through compalstage (as above) or through +# tfc139, the re-enabled Calypso boot ROM is used to load our loadagent +# into IRAM. The boot ROM will autodetect the Calypso input clock as +# 26 MHz (physical reality) when entered through compalstage, or as +# 13 MHz when entered through tfc139 - the latter results from the +# original fw setting bit 7 in the FFFF:FD02 register (VTCXO_DIV2), +# which the boot ROM does not clear. +# +# However, the following configuration will result in the ARM core +# being clocked at 52 MHz in both cases. + +pll-config 4/1 +rhea-cntl 0x00 + +# The remaining settings are carried out via loadagent commands +init-script compal.init
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/loadtools/scripts/compal.init Tue Jun 10 07:37:29 2014 +0000 @@ -0,0 +1,16 @@ +# Set WS=3 for both nCS0 and nCS1. This configuration is used by OsmocomBB +# for all 3 Compal models (E86/88/99), and is also seen in the IDA disassembly +# listing of c115-1.0.46.E firmware contributed by Christophe Devine. + +w16 fffffb00 00A3 +w16 fffffb02 00A3 + +# We need to set the FFFF:FB10 register to map the flash (not the boot ROM) +# to address 0. We need this mapping in order to be able to dump and program +# the entire flash, as for some reason the alternate nCS0 mapping at 0x03000000 +# does not work on Compal phones. (That alternate mapping works fine on +# Openmoko and Pirelli phones, though. Perhaps the different Calypso chip +# version is the culprit, or perhaps this alternate mapping works only if the +# physical nIBOOT pin is low.) + +w16 fffffb10 0300