FreeCalypso > hg > freecalypso-sw

changeset 154:47754cdb6248

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abb.c compiles!
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sun, 17 Nov 2013 05:53:10 +0000
parents 65efffcb28dc
children 3be2bc80ad38
files gsm-fw/L1/tpudrv/tpudrv.h gsm-fw/L1/tpudrv/tpudrv12.h gsm-fw/L1/tpudrv/tpudrv2.h gsm-fw/bsp/abb+spi/Makefile gsm-fw/bsp/abb+spi/abb.c gsm-fw/cfgmagic/post-target
diffstat 6 files changed, 73 insertions(+), 50 deletions(-) [+]
line wrap: on
line diff
--- a/gsm-fw/L1/tpudrv/tpudrv.h	Sun Nov 17 05:10:06 2013 +0000
+++ b/gsm-fw/L1/tpudrv/tpudrv.h	Sun Nov 17 05:53:10 2013 +0000
@@ -158,7 +158,7 @@
 
 
 
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
     // BB signals connected to serial link1
     #define BULON    0x80     // bit6
     #define BULCAL   0x40     // bit5
--- a/gsm-fw/L1/tpudrv/tpudrv12.h	Sun Nov 17 05:10:06 2013 +0000
+++ b/gsm-fw/L1/tpudrv/tpudrv12.h	Sun Nov 17 05:53:10 2013 +0000
@@ -14,7 +14,9 @@
 // TeST - Enable Main VCO buffer for test
 #define MAIN_VCO_ACCESS_WA  0                     // 1 => ENABLE the Main VCO buffer
 
+#if 0	// FreeCalypso
 #include "rf.cfg"
+#endif
 
 //--- RITA PG declaration
 
--- a/gsm-fw/L1/tpudrv/tpudrv2.h	Sun Nov 17 05:10:06 2013 +0000
+++ b/gsm-fw/L1/tpudrv/tpudrv2.h	Sun Nov 17 05:53:10 2013 +0000
@@ -30,7 +30,7 @@
 #define VG_BULOFF_DELAY 35
 #define VG_BULON_DELAY  159
     
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
   #define OM_CAL_RX_DELAY 65
   #define OM_CAL_TX_DELAY 230
   #define OM_BDLON_DELAY  166
@@ -50,7 +50,7 @@
 
 #ifdef TPUDRV2_C
 
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
   const unsigned short RF_Sleep[] ={
    /*** Immediate ***/
    TPU_MOVE(TSP_SPI_SET1, TSP_ENA_POS_MSB),
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/gsm-fw/bsp/abb+spi/Makefile	Sun Nov 17 05:53:10 2013 +0000
@@ -0,0 +1,18 @@
+CC=	arm-elf-gcc
+CFLAGS=	-O2 -fno-builtin -mthumb-interwork -mthumb
+LD=	arm-elf-ld
+
+OBJS=	abb.o
+
+HDRS=	abb.h abb_core_inth.h abb_inline.h abb_inth.h spi_api.h spi_drv.h \
+	spi_env.h spi_pool_size.h spi_process.h spi_task.h
+
+all:	xipcode.o
+
+${OBJS}:	${HDRS}
+
+xipcode.o:	${OBJS}
+	${LD} -r -o $@ ${OBJS}
+
+clean:
+	rm -f *.[oa] *errs
--- a/gsm-fw/bsp/abb+spi/abb.c	Sun Nov 17 05:10:06 2013 +0000
+++ b/gsm-fw/bsp/abb+spi/abb.c	Sun Nov 17 05:53:10 2013 +0000
@@ -34,12 +34,13 @@
 #include "../clkm.h"         // for wait_ARM_cycles function
 #include "abb_inline.h"
 #include "../ulpd.h"        // for FRAME_STOP definition
+
+#include "../../include/sys_types.h"
+#include "../../riviera/rv/general.h"
 #include "../../nucleus/nucleus.h"      // for NUCLEUS functions and types
 #include "../../L1/include/l1_types.h"
 
-#include "../../include/sys_types.h"
-#include "../../riviera/rv/general.h"
-#if 0
+#if 0	// FreeCalypso
 #include "buzzer/buzzer.h"	     // for BZ_KeyBeep_OFF function
 #endif
 
@@ -52,7 +53,7 @@
 #endif
 
 #if (RF_FAM == 12)
-  #include "tpudrv12.h" 
+  #include "../../L1/tpudrv/tpudrv12.h" 
   #include "../../L1/cust0/l1_rf12.h"
 #endif
 
@@ -96,11 +97,11 @@
 /*-----------------------------------------------------------------------*/
 void ABB_Wait_IBIC_Access(void)
 {
-  #if (ANLG_FAM ==1)
+  #if (ANALOG ==1)
     // Wait 6 OSCAS cycles (100 KHz) for first IBIC access 
     // (i.e wait 60us + 10% security marge = 66us)
     wait_ARM_cycles(convert_nanosec_to_cycles(66000));
-  #elif ((ANLG_FAM ==2) || (ANLG_FAM == 3))
+  #elif ((ANALOG ==2) || (ANALOG == 3))
     // Wait 6 x 32 KHz clock cycles for first IBIC access 
     // (i.e wait 187us + 10% security marge = 210us)
     wait_ARM_cycles(convert_nanosec_to_cycles(210000));
@@ -310,10 +311,10 @@
 
   ABB_SetPage(PAGE0);
 
-  #if (ANLG_FAM == 1) || (ANLG_FAM == 2)
+  #if (ANALOG == 1) || (ANALOG == 2)
     ABB_SetPage(PAGE0);
     reg_val = ABB_ReadRegister(VRPCSTS);
-  #elif (ANLG_FAM == 3)
+  #elif (ANALOG == 3)
     ABB_SetPage(PAGE1);
     reg_val = ABB_ReadRegister(VRPCCFG);
   #endif
@@ -343,7 +344,7 @@
 void ABB_on(SYS_UWORD16 modules, SYS_UWORD8 bRecoveryFlag)
 {
   volatile SYS_UWORD16 status;
-  #if ((ANLG_FAM ==2) || (ANLG_FAM == 3))
+  #if ((ANALOG ==2) || (ANALOG == 3))
     SYS_UWORD32 reg;
   #endif
  
@@ -379,7 +380,7 @@
   // This transmission disables MADC,AFC,VDL,VUL modules.
   ABB_WriteRegister(TOGBR1, 0x0155);  
 
-  #if (ANLG_FAM == 1)
+  #if (ANALOG == 1)
     // This transmission disables Band gap fast mode Enable BB charge.
     ABB_WriteRegister(VRPCCTL2, 0x1fc);  
 
@@ -409,7 +410,7 @@
     /* ************************  SELECTION OF TEST MODE FOR ABB **************************************** */
     /* This test configuration allows visibility on BULENA,BULON,BDLON,BDLENA on test pins               */
     /* ***************************************************************************************************/
-    #if (BOARD==6)&& (ANLG_FAM==1)  //BUG01967 to remove access to TAPCTRL   (EVA4 board and Nausica)                                                                 
+    #if (BOARD==6)&& (ANALOG==1)  //BUG01967 to remove access to TAPCTRL   (EVA4 board and Nausica)                                                                 
       // This transmission enables Omega test register.
       ABB_WriteRegister(TAPCTRL, 0x01);  
 
@@ -437,7 +438,7 @@
       // This transmission connects the resistive divider to MB and BB.
       ABB_WriteRegister(BCICTL1, 0x0005);  
     }
-  #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3)) 
+  #elif ((ANALOG == 2) || (ANALOG == 3)) 
     // Restore the ABB checks and debouncing if start on TESTRESETZ 
 
     // This transmission changes the register page in the ABB for usp to pg1.
@@ -455,11 +456,11 @@
     // This transmission changes the register page in the ABB for usp to pg2.
     ABB_SetPage(PAGE2);
 
-    #if (ANLG_FAM == 2)
+    #if (ANALOG == 2)
     // Restore push button environment
     ABB_WriteRegister(0x3C, 0x07);
 
-    #elif (ANLG_FAM == 3)
+    #elif (ANALOG == 3)
 
     // Restore push button environment
     ABB_WriteRegister(0x3C, 0xBF);
@@ -503,7 +504,7 @@
     ABB_WriteRegister(BCICONF, 0x060);  
 
      /* ************************  SELECTION OF BBCFG CONFIG FOR ABB 3 PG2_0 *******************************/
-      #if (ANLG_FAM == 3)
+      #if (ANALOG == 3)
         #if (ANLG_PG == S_PG_20)                     // SYREN PG2.0 ON EVACONSO
            ABB_WriteRegister(BBCFG, C_BBCFG);         // Initialize transmit register
         #endif
@@ -534,7 +535,7 @@
 
     /********* Sleep definition part ******************/
     // This transmission changes the register page in the ABB for usp to pg1.
-    #if (ANLG_FAM == 2)
+    #if (ANALOG == 2)
       ABB_SetPage(PAGE1);
 
       // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value.
@@ -545,7 +546,7 @@
       // update the ABB mask sleep register (regulator disabled in deep sleep), and clear previous mask value.
       reg = ABB_ReadRegister(VRPCMSK) & 0x1e0;
       ABB_WriteRegister(VRPCMSK, (MASK_SLEEP_MODE | reg));  
-    #elif (ANLG_FAM == 3)
+    #elif (ANALOG == 3)
          Syren_Sleep_Config(NORMAL_SLEEP,SLEEP_BG,SLPDLY);
     #endif
     //  This transmission changes the register page in the ABB for usp to pg0.
@@ -622,15 +623,15 @@
   *Buff++ = ABB_ReadRegister(ADIN2REG);
   *Buff++ = ABB_ReadRegister(ADIN3REG);
 
-  #if (ANLG_FAM ==1)
+  #if (ANALOG ==1)
     *Buff++ = ABB_ReadRegister(ADIN4XREG);
     *Buff++ = ABB_ReadRegister(ADIN5YREG);
-  #elif (ANLG_FAM ==2)
+  #elif (ANALOG ==2)
     *Buff++ = ABB_ReadRegister(ADIN4REG);
-   #elif (ANLG_FAM == 3)
+   #elif (ANALOG == 3)
     *Buff++ = ABB_ReadRegister(ADIN4REG);
     *Buff++ = ABB_ReadRegister(ADIN5REG);
-  #endif   // ANLG_FAM
+  #endif   // ANALOG
 
   #if (ABB_SEMAPHORE_PROTECTION == 3)  
   // release the semaphore only if it has correctly been created.
@@ -680,9 +681,9 @@
   ABB_SetPage(PAGE0);
 
   /* select ADC channels to be converted */
-  #if (ANLG_FAM == 1)  
+  #if (ANALOG == 1)  
     ABB_WriteRegister(MADCCTRL1, Channels);  
-  #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
+  #elif ((ANALOG == 2) || (ANALOG == 3))
     ABB_WriteRegister(MADCCTRL, Channels);  
   #endif
 
@@ -732,7 +733,8 @@
 
   // table for AFC allowed values during Sleep mode. First 5th elements
   // are related to positive AFC values, last 5th to negative ones.
-  SYS_UWORD32 Afcout_T[10]= {0x0f,0x1f,0x3f,0x7f,0xff,0x00,0x01,0x03,0x07,0x0f};
+  static const SYS_UWORD32 Afcout_T[10] =
+			{0x0f,0x1f,0x3f,0x7f,0xff,0x00,0x01,0x03,0x07,0x0f};
 
   // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.   
   SPI_Ready_for_RDWR
@@ -747,14 +749,14 @@
 
   if (sleep_performed == FRAME_STOP)   // Big sleep
   {
-    #if ((ANLG_FAM == 2) || (ANLG_FAM == 3))
+    #if ((ANALOG == 2) || (ANALOG == 3))
       //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP ////////////////////////////
     #endif
 
   }
   else                                  // Deep sleep 
   {
-    #if(ANLG_FAM == 1) 
+    #if(ANALOG == 1) 
       // SELECTION OF AFC TEST MODE FOR OMEGA 
       //---------------------------------------------------
       // This test configuration allows access on the AFCOUT register 
@@ -771,7 +773,7 @@
 
       ABB_SetPage(PAGE0);
 
-    #elif (ANLG_FAM == 2)
+    #elif (ANALOG == 2)
       // This configuration allows access on the AFCOUT register 
       ABB_SetPage(PAGE1);
 
@@ -799,7 +801,7 @@
       ABB_WriteRegister(BCICTL1, reg_val);  
     #endif
      
-     #if (ANLG_FAM == 3)              // Nothing to be done as MB and BB measurement bridges are automatically disconnected 
+     #if (ANALOG == 3)              // Nothing to be done as MB and BB measurement bridges are automatically disconnected 
                                               // in Syren during sleep mode. BB charge stays enabled 
        ABB_SetPage(PAGE1);                    // Initialize transmit reg_num. This transmission
                                               // change the register page in IOTA for usp to pg1
@@ -814,7 +816,7 @@
 
     // Switch off Analog supply LDO
     //-----------------------------
-    #if (ANLG_FAM == 1)  
+    #if (ANALOG == 1)  
       ABB_SetPage(PAGE1);
   
       // Read VRPCCTL3 register value and switch off VR3.  
@@ -822,7 +824,7 @@
 
       ABB_WriteRegister(VRPCCTRL3, reg_val);  
       
-    #elif (ANLG_FAM == 2)
+    #elif (ANALOG == 2)
       // Read VRPCSTS register value and extract status of meaningfull inputs.  
       reg_val = ABB_ReadRegister(VRPCSTS) & 0x0070;
 
@@ -835,7 +837,7 @@
       // Dummy transmission to clean of ABB bus. This transmission accesses IOTA address 0 in "read".
       ABB_WriteRegister(0x0000 | 0x0001, 0x0000);  
 
-    #elif (ANLG_FAM == 3)
+    #elif (ANALOG == 3)
        // In Syren there is no need to check for VRPCCFG as wake up prioritys are changed
        // start the SLPDLY counter in order to switch the ABB in sleep mode
        ABB_WriteRegister(VRPCDEV,0x02);     // Initialize transmit reg_num. This transmission
@@ -889,7 +891,7 @@
 
   if (sleep_performed == FRAME_STOP)   // Big sleep
   { 
-    #if ((ANLG_FAM == 2) || (ANLG_FAM == 3))
+    #if ((ANALOG == 2) || (ANALOG == 3))
       //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP WAKEUP ////////////////////////////
     #endif
   }
@@ -909,7 +911,7 @@
     ABB_free_13M();
 
     // Switch ON Analog supply LDO
-    #if (ANLG_FAM == 1)   
+    #if (ANALOG == 1)   
       ABB_SetPage(PAGE1);
 
       // Read VRPCCTL3 register value and switch on VR3.  
@@ -928,7 +930,7 @@
     // This transmission sets the AUXAFC1. 
     ABB_WriteRegister(AUXAFC1, (afc & 0x3ff));  
 
-    #if (ANLG_FAM == 1)
+    #if (ANALOG == 1)
       // Remove AFC test mode  
       ABB_SetPage(PAGE1);
 
@@ -941,7 +943,7 @@
 
       ABB_SetPage(PAGE0);
 
-    #elif (ANLG_FAM == 2)
+    #elif (ANALOG == 2)
       ABB_SetPage(PAGE1);
 
       // Read AFCCTLADD register value and disable USP access to AFCOUT register.  
@@ -971,7 +973,7 @@
       ABB_WriteRegister(BCICTL1, reg_val);  
     #endif   
 
-  #if (ANLG_FAM == 3)
+  #if (ANALOG == 3)
 
     ABB_SetPage(PAGE1);
 
@@ -1030,15 +1032,15 @@
 
   ABB_SetPage(PAGE1);
     
-  #if (ANLG_FAM == 1)  
+  #if (ANALOG == 1)  
     // This transmission initializes the VRPCCTL1 register.
     ABB_WriteRegister(VRPCCTRL1, value);  
 
-  #elif (ANLG_FAM == 2)
+  #elif (ANALOG == 2)
     // This transmission initializes the VRPCSIM register.
     ABB_WriteRegister(VRPCSIM, value);  
 
-  #elif (ANLG_FAM == 3)
+  #elif (ANALOG == 3)
     // This transmission initializes the VRPCSIMR register.
     ABB_WriteRegister(VRPCSIMR, value);  
 
@@ -1097,7 +1099,7 @@
 
 //////////////////////// IDEV-INLO integration of sleep mode for Syren ///////////////////////////////////////
 
-#if (ANLG_FAM == 3)
+#if (ANALOG == 3)
 
   // Syren Sleep configuration function --------------------------
   void Syren_Sleep_Config(SYS_UWORD16 sleep_type,SYS_UWORD16 bg_select, SYS_UWORD16 sleep_delay)
@@ -1134,23 +1136,22 @@
   // Wait also until <ON/OFF> key is released.
   // This is needed to avoid, if the power key is pressed for a long time, to switch
   // ON-switch OFF the mobile, until the power key is released.
-  #if((ANLG_FAM == 1) || (ANLG_FAM == 2)) 
+  #if((ANALOG == 1) || (ANALOG == 2)) 
     while ((ABB_Read_Status() & ONREFLT) == PWR_OFF_KEY_PRESSED) {
-  #elif(ANLG_FAM == 3) 
+  #elif(ANALOG == 3) 
     while ((ABB_Read_Register_on_page(PAGE1, VRPCCFG) & PWOND) == PWR_OFF_KEY_PRESSED) {
   #endif
   
   NU_Sleep (1); }
 
+#if 0	// FreeCalypso
   BZ_KeyBeep_OFF();
+#endif
 
-  #if(ANLG_FAM == 1) 
+  #if(ANALOG == 1) 
     ABB_Write_Register_on_page(PAGE0, VRPCCTL2, 0x00EE);
-  #elif((ANLG_FAM == 2) || (ANLG_FAM == 3)) 
+  #elif((ANALOG == 2) || (ANALOG == 3)) 
     ABB_Write_Register_on_page(PAGE0, VRPCDEV, 0x0001);
   #endif 
 }
 #endif
-
-
-
--- a/gsm-fw/cfgmagic/post-target	Sun Nov 17 05:10:06 2013 +0000
+++ b/gsm-fw/cfgmagic/post-target	Sun Nov 17 05:53:10 2013 +0000
@@ -87,6 +87,7 @@
 case "$RF_type" in
 	Rita*)
 		RF_FAM=12
+		RF_PG=2
 		;;
 	*)
 		echo "Error: unknown RF_type=$RF_type" 1>&2
@@ -94,6 +95,7 @@
 		;;
 esac
 export_to_c	RF_FAM
+export_to_c	RF_PG
 
 # !!! Dirty hack !!!
 #