--- a/gsm-fw/L1/tpudrv/tpudrv12.h	Tue May 03 19:51:41 2016 +0000
+++ b/gsm-fw/L1/tpudrv/tpudrv12.h	Tue May 03 23:46:54 2016 +0000
@@ -275,7 +275,7 @@
   #define TU_1900    ( PA_HI_BAND | FEM_PINS ^ FEM_8 )
   #define TD_1900    ( PA_OFF     | FEM_PINS ^ 0     )
 
-#elif CONFIG_TARGET_GTAMODEM
+#elif CONFIG_TARGET_GTAMODEM || CONFIG_TARGET_FCDEV3B
 
   // Openmoko's triband configuration is a bastardized version
   // of TI's quadband one from Leonardo/E-Sample

--- a/gsm-fw/bsp/armio.c	Tue May 03 19:51:41 2016 +0000
+++ b/gsm-fw/bsp/armio.c	Tue May 03 23:46:54 2016 +0000
@@ -224,6 +224,48 @@
 }
 #endif
 
+#ifdef CONFIG_TARGET_FCDEV3B
+/* version for the to-be-built FCDEV3B board */
+void AI_InitIOConfig(void)
+{
+  // reset the IOs config
+  AI_ResetIoConfig();
+
+  AI_EnableBit(0);
+  AI_DisableBit(1);
+  AI_EnableBit(2);
+  AI_EnableBit(4);
+
+  /*
+   * The MCSI pins are brought out to a header with the intent of
+   * facilitating experimentation with this interface, so let's put them
+   * into the MCSI configuration.
+   */
+  AI_DisableBit(5);
+  AI_DisableBit(6);
+  AI_DisableBit(7);
+  AI_DisableBit(8);
+
+  AI_EnableBit(9);
+
+  // ARMIO_OUT register configuration: same as TI's code sets
+  // the loudspeaker PA is disabled on boot for the time being
+  *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F00;
+
+  // ARMIO_CNTL_REG register configuration:
+  // most of the pins are no-connects, make them outputs
+
+  AI_ConfigBitAsOutput(0);
+  AI_ConfigBitAsOutput(1);
+  AI_ConfigBitAsOutput(2);
+  AI_ConfigBitAsOutput(4);
+  AI_ConfigBitAsOutput(6);
+  AI_ConfigBitAsOutput(8);
+  AI_ConfigBitAsOutput(9);
+  AI_ConfigBitAsOutput(13);
+}
+#endif
+
 #ifdef CONFIG_TARGET_PIRELLI
 /* version for Pirelli DP-L10 */
 void AI_InitIOConfig(void)

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/gsm-fw/cfgmagic/target.fcdev3b	Tue May 03 23:46:54 2016 +0000
@@ -0,0 +1,32 @@
+CONFIG_TARGET_FCDEV3B=1
+CONFIG_TARGET_FCFAM=1
+export_to_c	CONFIG_TARGET_FCDEV3B
+export_to_c	CONFIG_TARGET_FCFAM
+
+CONFIG_IRAM_SIZE=0x80000
+CONFIG_XRAM_SIZE=0x800000
+CONFIG_FWFLASH_SIZE=0x800000
+# the post-target fragment exports these
+
+# RAMFFS: default to 64 KiB x 8
+RAMFFS_BLKSIZE_LOG2=16
+RAMFFS_NBLOCKS=8
+
+# select the correct flash driver
+Flash_type=AMD-multibank
+
+# 2nd flash chip select
+FLASH2_BASE_ADDR=0x01800000
+export_to_c	FLASH2_BASE_ADDR
+
+DBB_type=751992A
+ABB_type=Iota3025
+RF_type=Rita
+# the post-target fragment will turn these into TI's voodoo numbers
+
+# For the RF PA we have to set TI's voodoo number directly. :-(
+RF_PA=2
+# We know this setting is correct for the RF3166 PA thanks to the Sotovik find.
+
+allow_target_feature	at-modem
+allow_target_feature	aftermarket-ffs

--- a/gsm-fw/g23m-gsm/rr/rr_csf.c	Tue May 03 19:51:41 2016 +0000
+++ b/gsm-fw/g23m-gsm/rr/rr_csf.c	Tue May 03 23:46:54 2016 +0000
@@ -440,10 +440,14 @@
     FldSetEx (rfcap_stream.power2, rfCap_1900, POWER_CLASS_1);
     FldSetEx (rfcap_stream.power2, rfCap_850,  POWER_CLASS_4);
 
-#if CONFIG_TARGET_PIRELLI
+#if CONFIG_TARGET_PIRELLI || CONFIG_TARGET_FCDEV3B
     /*
-     * This target is known to always be 900/1800/1900 MHz triband,
+     * The Pirelli is known to always be 900/1800/1900 MHz triband,
      * so let's operate it as such by default.
+     *
+     * In the case of FCDEV3B there is at least a hypothetical possibility
+     * that we may need to build a tri850 version some day, but we can
+     * still default to tri900 - overriding defaults is what the FFS is for.
      */
     rfcap_stream.bands &= ~BAND_GSM_850;
     FldSetEx (rfcap_stream.power2, rfCap_850, 0);

--- a/gsm-fw/services/ffs/cfgffs.c	Tue May 03 19:51:41 2016 +0000
+++ b/gsm-fw/services/ffs/cfgffs.c	Tue May 03 23:46:54 2016 +0000
@@ -52,7 +52,7 @@
     .numblocks	   = CONFIG_AFTERMARKET_FFS_NBLOCKS,
 };
 
-#elif CONFIG_TARGET_PIRELLI
+#elif CONFIG_TARGET_PIRELLI || CONFIG_TARGET_FCFAM
 
 struct dev_s dev = {
     .base	   = (char *) FLASH2_BASE_ADDR +

--- a/gsm-fw/sysglue/flashboot.S	Tue May 03 19:51:41 2016 +0000
+++ b/gsm-fw/sysglue/flashboot.S	Tue May 03 23:46:54 2016 +0000
@@ -80,6 +80,11 @@
 	strh	r0, [r2, #0]
 	strh	r0, [r2, #2]
 	strh	r0, [r2, #6]
+#elif CONFIG_TARGET_FCFAM
+	mov	r0, #0x00A4
+	strh	r0, [r2, #0]
+	strh	r0, [r2, #2]
+	strh	r0, [r2, #4]
 #else
 	mov	r0, #0x00A3
 	strh	r0, [r2, #0]
@@ -93,7 +98,7 @@
  * and ramImage, so let's only do this setting on those targets
  * on which we do it in ../../loadtools/scripts/*.init (for fc-xram).
  */
-#if CONFIG_TARGET_PIRELLI || CONFIG_TARGET_C155
+#if CONFIG_TARGET_PIRELLI || CONFIG_TARGET_C155 || CONFIG_TARGET_FCFAM
 	ldr	r1, =0xFFFEF006
 	mov	r2, #0x0008
 	strh	r2, [r1]