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changeset 548:67ab5f240b7d

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gsm-fw/L1/cfile/*.c: s/ANLG_FAM/ANALOG/
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sun, 03 Aug 2014 16:13:52 +0000
parents 32f7494783db
children b1e2dbb3c751
files gsm-fw/L1/cfile/l1_afunc.c gsm-fw/L1/cfile/l1_async.c gsm-fw/L1/cfile/l1_cmplx.c gsm-fw/L1/cfile/l1_drive.c gsm-fw/L1/cfile/l1_init.c gsm-fw/L1/cfile/l1_pwmgr.c gsm-fw/L1/cfile/l1_trace.c
diffstat 7 files changed, 40 insertions(+), 40 deletions(-) [+]
line wrap: on
line diff
--- a/gsm-fw/L1/cfile/l1_afunc.c	Sun Aug 03 07:07:24 2014 +0000
+++ b/gsm-fw/L1/cfile/l1_afunc.c	Sun Aug 03 16:13:52 2014 +0000
@@ -107,7 +107,7 @@
 
 
 #if (OP_L1_STANDALONE == 1)
-#if (ANLG_FAM == 11)
+#if (ANALOG == 11)
 #include "bspTwl3029_Madc.h"
 #endif
 #endif
@@ -120,7 +120,7 @@
 #include <string.h>
 extern T_DRP_SRM_API* drp_srm_api;
 #endif
-#if (ANLG_FAM == 11)
+#if (ANALOG == 11)
 BspTwl3029_MadcResults l1_madc_results;
 void l1a_madc_callback(void);
 #endif
@@ -1112,7 +1112,7 @@
 
 #if (L1_MADC_ON == 1)
 #if (OP_L1_STANDALONE == 1)
-#if (ANLG_FAM == 11)
+#if (ANALOG == 11)
 void   l1a_madc_callback(void)
 {
 	char str[40];
@@ -1159,7 +1159,7 @@
    os_send_sig(adc_msg, RRM1_QUEUE);
 #endif
 }
-#endif // ANLG_FAM == 11
+#endif // ANALOG == 11
 #endif //OP_L1_STANDALONE
 #endif // L1_MADC_ON
 
--- a/gsm-fw/L1/cfile/l1_async.c	Sun Aug 03 07:07:24 2014 +0000
+++ b/gsm-fw/L1/cfile/l1_async.c	Sun Aug 03 16:13:52 2014 +0000
@@ -6758,7 +6758,7 @@
             //         0   |    1   speech decoder
             //         0   |    0   no test
 
-            #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (ANLG_FAM == 11))
+            #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3) || (ANALOG == 11))
               vbctl3 = ( (l1s_dsp_com.dsp_ndb_ptr ->d_dai_onoff & 0xE7FF) |
                        (dai_vbctl3[((T_OML1_START_DAI_TEST_REQ *)(msg->SigP))->tested_device] << 11) );
               l1s_dsp_com.dsp_ndb_ptr ->d_dai_onoff = vbctl3 | TRUE;
@@ -6787,7 +6787,7 @@
             // DAI test is stopped "on fly".
             l1a_l1s_com.dedic_set.aset->dai_mode = 0;
 
-             #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+             #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
               // program vbctl3
               vbctl3 = (l1s_dsp_com.dsp_ndb_ptr ->d_dai_onoff & 0xE7FF);
               l1s_dsp_com.dsp_ndb_ptr ->d_dai_onoff = vbctl3 | TRUE;
--- a/gsm-fw/L1/cfile/l1_cmplx.c	Sun Aug 03 07:07:24 2014 +0000
+++ b/gsm-fw/L1/cfile/l1_cmplx.c	Sun Aug 03 16:13:52 2014 +0000
@@ -147,7 +147,7 @@
   #include "l1tm_signa.h"
   #include "l1tm_varex.h"
   void l1tm_fill_burst (UWORD16 pattern, UWORD16 *TM_ul_data);
-  #if (ANLG_FAM != 11)
+  #if (ANALOG != 11)
   void ABB_Write_Uplink_Data(SYS_UWORD16 *TM_ul_data);
   #else
   // TODO
--- a/gsm-fw/L1/cfile/l1_drive.c	Sun Aug 03 07:07:24 2014 +0000
+++ b/gsm-fw/L1/cfile/l1_drive.c	Sun Aug 03 16:13:52 2014 +0000
@@ -196,7 +196,7 @@
 void   l1dmacro_adc_read_rx (void);
 
 void Cust_get_ramp_tab(API *a_ramp, UWORD8 txpwr_ramp_up, UWORD8 txpwr_ramp_down, UWORD16 radio_freq);
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (RF_FAM == 61))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3) || (RF_FAM == 61))
   UWORD16 Cust_get_pwr_data(UWORD8 txpwr, UWORD16 radio_freq
   										  #if(REL99 && FF_PRF)
   										  ,UWORD8 number_uplink_timeslot
@@ -380,7 +380,7 @@
 #endif
     //######################## For DSP Rom #################################
     l1s_dsp_com.dsp_db_w_ptr->d_afc = afc;                      // Write new afc command.
-    #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (RF_FAM == 61))
+    #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3) || (RF_FAM == 61))
     // NOTE: In Locosto AFC loading is w.r.t DRP not in ABB
       l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= (1 << B_AFC);     // Validate new afc value.
     #endif
@@ -422,7 +422,7 @@
 /*-------------------------------------------------------*/
 void l1ddsp_load_txpwr(UWORD8 txpwr, UWORD16 radio_freq)
 {
-  #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (RF_FAM == 61))
+  #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3) || (RF_FAM == 61))
     UWORD16 pwr_data;
   #endif
 
@@ -445,7 +445,7 @@
 	   #endif
     #endif
 
-    #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+    #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
       l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL) | (1 << B_BULRAMPDEL2));
     #endif
 
@@ -487,7 +487,7 @@
     if(txpwr == NO_TXPWR)
     {
        /*** No transmit ***/
-       #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+       #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
          l1s_dsp_com.dsp_db_w_ptr->d_power_ctl = 0x12; // AUXAPC initialization addr 9 pg 0 Omega
          l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL)  | (1 << B_BULRAMPDEL2));
        #endif
@@ -510,7 +510,7 @@
       									  );
 
       /*** Load power control level adding the APC address register ***/
-      #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+      #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
         l1s_dsp_com.dsp_db_w_ptr->d_power_ctl = ((pwr_data << 6) | 0x12);
         // AUXAPC initialization addr 9 pg 0 Omega
       #endif
@@ -540,7 +540,7 @@
 		    #endif
           #endif
 
-          #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+          #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
 	    // Setting bit 3 of this register causes DSP to write to APCDEL1 register in Omega. However,
             // we are controlling this register from MCU through the SPI. Therefore, set it to 0.
             l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (0 << B_BULRAMPDEL)  | (1 << B_BULRAMPDEL2));
@@ -574,7 +574,7 @@
 	   #endif
       #endif
 
-      #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) ||(RF_FAM == 61))
+      #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3) ||(RF_FAM == 61))
         l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL)  | (1 << B_BULRAMPDEL2));
       #endif
     }
@@ -1246,7 +1246,7 @@
     if (win_id == 0)
   #endif
   {
-    #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+    #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
     // NOTE: In Locosto AFC is in DRP not in triton
         l1ddsp_load_afc(l1s.afc);
     #endif
@@ -1597,7 +1597,7 @@
   l1dmacro_rx_nb   (radio_freq, csf_filter_choice); // RX window for NB.
  #endif
 
-  #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+  #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
       l1ddsp_load_afc(l1s.afc);
   #endif
   #if (RF_FAM == 61)
--- a/gsm-fw/L1/cfile/l1_init.c	Sun Aug 03 07:07:24 2014 +0000
+++ b/gsm-fw/L1/cfile/l1_init.c	Sun Aug 03 16:13:52 2014 +0000
@@ -99,7 +99,7 @@
 
   #include "spi_drv.h"
   #include "abb.h"
-  #if (ANLG_FAM != 11)
+  #if (ANALOG != 11)
   #include "abb_core_inth.h"
   #endif
 
@@ -196,7 +196,7 @@
   #include <string.h>
   #include <stdio.h>
 
-#if (ANLG_FAM == 11)
+#if (ANALOG == 11)
   #include "bspTwl3029_I2c.h"
   #include "bspTwl3029_Aud_Map.h"
   #include "bspTwl3029_Madc.h"
@@ -205,7 +205,7 @@
 #include "l1_drp_if.h"
 #include "drp_main.h" 
 //
-#if (ANLG_FAM == 11)
+#if (ANALOG == 11)
 #if (L1_MADC_ON == 1)
 extern BspTwl3029_MadcResults l1_madc_results;
 extern void l1a_madc_callback(void);
@@ -379,14 +379,14 @@
     l1s_dsp_com.dsp_ndb_ptr->a_fd[2]          = 0xffff;        // NERR = 0xffff
     l1s_dsp_com.dsp_ndb_ptr->d_a5mode         = 0;
 
-    #if ((ANLG_FAM == 1) || (ANLG_FAM == 2)  || (ANLG_FAM == 3) || (ANLG_FAM == 11))
+    #if ((ANALOG == 1) || (ANALOG == 2)  || (ANALOG == 3) || (ANALOG == 11))
       l1s_dsp_com.dsp_ndb_ptr->d_tch_mode     = 0x0800;  // Analog base band selected = Nausica, Iota, Syren (bit 11)
     #endif
 
-    #if ((ANLG_FAM == 1) || (ANLG_FAM == 2)  || (ANLG_FAM == 3))
+    #if ((ANALOG == 1) || (ANALOG == 2)  || (ANALOG == 3))
       l1s_dsp_com.dsp_ndb_ptr->d_tch_mode    |= (((l1_config.params.guard_bits - 4) & 0x000F) << 7); //Bit 7..10: guard bits
     #endif
-    #if (ANLG_FAM == 11)
+    #if (ANALOG == 11)
       l1s_dsp_com.dsp_ndb_ptr->d_tch_mode    |= (((l1_config.params.guard_bits) & 0x000F) << 7); //Bit 7..10: guard bits
     #endif
 
@@ -760,7 +760,7 @@
   #endif
 
 
-    #if (ANLG_FAM == 1)
+    #if (ANALOG == 1)
       // Omega registers values will be programmed at 1st DSP communication interrupt
 
       dsp_ndb_ptr->d_debug1      = l1_config.params.debug1;      // Enable f_tx delay of 400000 cyc DEBUG
@@ -786,7 +786,7 @@
         dsp_ndb_ptr->d_apcdel2     = 0x0000;
       #endif
     #endif
-    #if (ANLG_FAM == 2)
+    #if (ANALOG == 2)
       // Iota registers values will be programmed at 1st DSP communication interrupt
 
       dsp_ndb_ptr->d_debug1      = l1_config.params.debug1;      // Enable f_tx delay of 400000 cyc DEBUG
@@ -807,7 +807,7 @@
       dsp_ndb_ptr->d_apcdel1     =l1_config.params.apcdel1;
       dsp_ndb_ptr->d_apcdel2     = l1_config.params.apcdel2;
     #endif
-    #if (ANLG_FAM == 3)
+    #if (ANALOG == 3)
       // Syren registers values will be programmed at 1st DSP communication interrupt
 
       dsp_ndb_ptr->d_debug1      = l1_config.params.debug1;      // Enable f_tx delay of 400000 cyc DEBUG
@@ -842,7 +842,7 @@
 
     #endif
 
-    #if (ANLG_FAM == 11)
+    #if (ANALOG == 11)
 // The following settings need to be done only in L1 StandALoen as PSP would
 // do in the case of full PS Build...
 
--- a/gsm-fw/L1/cfile/l1_pwmgr.c	Sun Aug 03 07:07:24 2014 +0000
+++ b/gsm-fw/L1/cfile/l1_pwmgr.c	Sun Aug 03 16:13:52 2014 +0000
@@ -1560,7 +1560,7 @@
 // Power management is enabled
     WORD32   min_time, OSload, HWtimer,wake_up_time,min_time_gauging;
     UWORD32  sleep_mode;
-    #if (ANLG_FAM != 11)
+    #if (ANALOG != 11)
     WORD32   afc_fix;
     #endif
     UWORD32  uw32_store_next_time;
@@ -2057,7 +2057,7 @@
        //==============================================
        // if CLOCK_STOP or FRAME-STOP : Asleep OMEGA (ABB)
        //==============================================
-       #if (ANLG_FAM != 11)
+       #if (ANALOG != 11)
        afc_fix = ABB_sleep(l1s.pw_mgr.sleep_performed, l1s.afc,l1s.pw_mgr.afc_bypass_mode);
        #else
        // Nothing to be done as it should be handled by BSP_TWL3029_Configure_DS/BS
@@ -2334,7 +2334,7 @@
         //=================================================
         // Wake up ABB
         //=================================================
-        #if (ANLG_FAM != 11)
+        #if (ANALOG != 11)
         ABB_wakeup(l1s.pw_mgr.sleep_performed,l1s.afc,l1s.pw_mgr.afc_bypass_mode);
         #else
         // Nothing to be done here as it will be handled by BSP_TWL3029_Wakeup_DS/BS
--- a/gsm-fw/L1/cfile/l1_trace.c	Sun Aug 03 07:07:24 2014 +0000
+++ b/gsm-fw/L1/cfile/l1_trace.c	Sun Aug 03 16:13:52 2014 +0000
@@ -17685,7 +17685,7 @@
 
 
     // Analog Based Band - removed in ROM 38
-    #if (ANLG_FAM == 11)
+    #if (ANALOG == 11)
       sprintf (str,"d_afcctladd_hole:0x%4.4x \n\r",api_dump_cnvt_mcu_to_dsp(((UWORD32) &(l1s_dsp_com.dsp_ndb_ptr->d_afcctladd_hole))));      // 0x08ED
       L1_send_low_level_trace(str)
       wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));
@@ -17697,7 +17697,7 @@
 
     #endif
 
-    #if (ANLG_FAM == 11)
+    #if (ANALOG == 11)
       sprintf (str,"d_vbuctrl_hole:0x%4.4x \n\r",api_dump_cnvt_mcu_to_dsp(((UWORD32) &(l1s_dsp_com.dsp_ndb_ptr->d_vbuctrl_hole))));        // 0x08EE - removed in ROM38
       L1_send_low_level_trace(str)
       wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));
@@ -17742,35 +17742,35 @@
     wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));
 
 
-    //#if (ANLG_FAM == 1)
+    //#if (ANALOG == 1)
     //  sprintf (str,"d_vbctrl:0x%4.4x \n\r",api_dump_cnvt_mcu_to_dsp(((UWORD32) &(l1s_dsp_com.dsp_ndb_ptr->d_vbctrl))));
     //  L1_send_low_level_trace(str)
     //  wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));
 
-    //#elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
+    //#elif ((ANALOG == 2) || (ANALOG == 3))
     //  sprintf (str,"d_vbctrl1:0x%4.4x \n\r",api_dump_cnvt_mcu_to_dsp(((UWORD32) &(l1s_dsp_com.dsp_ndb_ptr->d_vbctrl1))));
     //  L1_send_low_level_trace(str)
     //  wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));
 
     //#endif
 
-    #if (ANLG_FAM == 1)
+    #if (ANALOG == 1)
       sprintf (str,"d_vbctrl:0x%4.4x \n\r",api_dump_cnvt_mcu_to_dsp(((UWORD32) &(l1s_dsp_com.dsp_ndb_ptr->d_vbctrl))));
       L1_send_low_level_trace(str)
       wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));
 
-    #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
+    #elif ((ANALOG == 2) || (ANALOG == 3))
       sprintf (str,"d_vbctrl1:0x%4.4x \n\r",api_dump_cnvt_mcu_to_dsp(((UWORD32) &(l1s_dsp_com.dsp_ndb_ptr->d_vbctrl1))));
       L1_send_low_level_trace(str)
       wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));
 
-    #elif (ANLG_FAM == 11)
+    #elif (ANALOG == 11)
       sprintf (str,"d_vbctrl_hole:0x%4.4x \n\r",api_dump_cnvt_mcu_to_dsp(((UWORD32) &(l1s_dsp_com.dsp_ndb_ptr->d_vbctrl_hole))));         // 0x08F6 - removed in ROM38
       L1_send_low_level_trace(str)
       wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));
 
     #endif
-    #if (ANLG_FAM == 11)
+    #if (ANALOG == 11)
       sprintf (str,"d_bbctrl_hole:0x%4.4x \n\r",api_dump_cnvt_mcu_to_dsp(((UWORD32) &(l1s_dsp_com.dsp_ndb_ptr->d_bbctrl_hole))));         // 0x08F7 - removed in ROM38
       L1_send_low_level_trace(str)
       wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));
@@ -18064,7 +18064,7 @@
     wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));
 
 
-#if (ANLG_FAM == 3)
+#if (ANALOG == 3)
     // SYREN specific registers
     sprintf (str,"d_vbpop:0x%4.4x \n\r",api_dump_cnvt_mcu_to_dsp(((UWORD32) &(l1s_dsp_com.dsp_ndb_ptr->d_vbpop))));
     L1_send_low_level_trace(str)
@@ -18094,7 +18094,7 @@
     L1_send_low_level_trace(str)
     wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));
 
-#elif ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 11))
+#elif ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 11))
     sprintf (str,"d_hole3_ndb[0]:0x%4.4x \n\r",api_dump_cnvt_mcu_to_dsp(((UWORD32) &(l1s_dsp_com.dsp_ndb_ptr->d_hole3_ndb[0]))));
     L1_send_low_level_trace(str)
     wait_ARM_cycles(convert_nanosec_to_cycles(API_DUMP_DELAY_NS));