FreeCalypso > hg > freecalypso-sw

changeset 109:91460c8957f0

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
nuc-fw/bsp: beginning of reconciliation with the Leonardo semi-src version
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sat, 19 Oct 2013 18:59:34 +0000
parents 3b9cc76f2073
children 325bbadc0c9c
files nuc-fw/bsp/armio.h nuc-fw/bsp/clkm.h nuc-fw/bsp/inth.h nuc-fw/bsp/iq.h nuc-fw/bsp/timer.h nuc-fw/bsp/timer1.h nuc-fw/bsp/timer2.h
diffstat 7 files changed, 58 insertions(+), 24 deletions(-) [+]
line wrap: on
line diff
--- a/nuc-fw/bsp/armio.h	Fri Sep 13 17:00:09 2013 +0000
+++ b/nuc-fw/bsp/armio.h	Sat Oct 19 18:59:34 2013 +0000
@@ -39,6 +39,9 @@
   #define ARMIO_GPIO_EVENT_MODE (MEM_ARMIO + 0x14) /* GPIO event mode */
   #define ARMIO_KBD_GPIO_INT    (MEM_ARMIO + 0x16) /* Kbd/GPIO IRQ register */
   #define ARMIO_KBD_GPIO_MASKIT (MEM_ARMIO + 0x18) /* Kbd/GPIO mask IRQ */
+// CC test 0316  
+  #define ARMIO_GPIO_DEBOUNCE   (MEM_ARMIO + 0x1A) /* GPIO debounceing register*/
+// end  
 #endif
 
 
--- a/nuc-fw/bsp/clkm.h	Fri Sep 13 17:00:09 2013 +0000
+++ b/nuc-fw/bsp/clkm.h	Sat Oct 19 18:59:34 2013 +0000
@@ -26,6 +26,8 @@
 
    Sccs Id  (SID)       : '@(#) clkm.h 1.10 10/23/01 14:34:54 '
 
+ * FreeCalypso note: this version of clkm.h originates
+ * from the MV100-0.1.rar find.
  
 *****************************************************************************/
 
@@ -255,6 +257,11 @@
 
 #define CLKM_INITCNTL(value) (* (volatile SYS_UWORD16 *) CLKM_CNTL_CLK = value)
 
+/*
+ * NOTE: the version of the CLKM_INITCNTL() macro in the Sotomodem source
+ * does |= instead of =.  It remains to be investigated which is more correct.
+ */
+
 
 #if ((CHIPSET != 4) && (CHIPSET != 7) && (CHIPSET != 8) && (CHIPSET != 10) && (CHIPSET != 11) && (CHIPSET != 12))
   /*---------------------------------------------------------------/
@@ -363,11 +370,11 @@
 /* ----- Prototypes ----- */
 
 #if ((CHIPSET == 4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
-  inline void CLKM_InitARMClock(SYS_UWORD16 clk_src, SYS_UWORD16 clk_div, SYS_UWORD16 clk_xp5);
+  void CLKM_InitARMClock(SYS_UWORD16 clk_src, SYS_UWORD16 clk_div, SYS_UWORD16 clk_xp5);
 #else
-  inline void CLKM_InitARMClock(SYS_UWORD16 clk_src, SYS_UWORD16 clk_div);
+  void CLKM_InitARMClock(SYS_UWORD16 clk_src, SYS_UWORD16 clk_div);
 #endif
 
 void wait_ARM_cycles(SYS_UWORD32 cpt_loop);
 void initialize_wait_loop(void);
-inline SYS_UWORD32 convert_nanosec_to_cycles(SYS_UWORD32 time);
+SYS_UWORD32 convert_nanosec_to_cycles(SYS_UWORD32 time);
--- a/nuc-fw/bsp/inth.h	Fri Sep 13 17:00:09 2013 +0000
+++ b/nuc-fw/bsp/inth.h	Sat Oct 19 18:59:34 2013 +0000
@@ -16,9 +16,9 @@
 
    Author         	: pmonteil@tif.ti.com  Patrice Monteil.
 
-   Version number	: 1.10
+   Version number   : 1.17
 
-   Date and time	: 01/30/01 10:22:23
+   Date             : 09/02/03
 
    Previous delta 	: 01/22/01 10:32:33
 
@@ -32,9 +32,11 @@
 #include "../include/config.h"
 #include "../include/sys_types.h"
 
+#if (CHIPSET != 12)
+
 /* Adress of the registers */
 
-#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9)|| (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
+#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9)|| (CHIPSET == 10) || (CHIPSET == 11))
   #define INTH_IT_REG1    MEM_INTH_ADDR 		  /* INTH IT register 1 */
   #define INTH_IT_REG2    (MEM_INTH_ADDR + 0x02)  /* INTH IT register 2 */
   #define INTH_MASK_REG1  (MEM_INTH_ADDR + 0x08)  /* INTH mask register 1 */
@@ -65,7 +67,7 @@
 /* Bit definition of INTH interrupt level registers */
 
 #define INTH_FIQ_NIRQ	0x0001
-#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
+#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
   #define INTH_PRIORITY	  0x007c
   #define INTH_EDGE_NLVL  0x0002
 #else
@@ -76,7 +78,7 @@
 
 /* Bit definition of INTH source binary registers */
 
-#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
+#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
   #define INTH_SRC_NUM	0x001f
 #else
   #define INTH_SRC_NUM	0x000f
@@ -109,7 +111,7 @@
 /* Return     :	none						*/
 /* Functionality : Unmask one it				*/
 /*--------------------------------------------------------------*/
-#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
+#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
   #define INTH_ENABLEONEIT(it)( \
     (it < 16) ? (* (volatile unsigned short *) INTH_MASK_REG1 &= ~(1 << it)) : \
                 (* (volatile unsigned short *) INTH_MASK_REG2 &= ~(1 << (it-16))) \
@@ -125,7 +127,7 @@
 /* Return     :	none						*/
 /* Functionality : mask one it					*/
 /*--------------------------------------------------------------*/
-#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
+#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
   #define INTH_DISABLEONEIT(it)( \
     (it < 16) ? (* (volatile unsigned short *) INTH_MASK_REG1 |= (1 << it)) : \
                 (* (volatile unsigned short *) INTH_MASK_REG2 |= (1 << (it-16))) \
@@ -142,7 +144,7 @@
 /* Functionality : Enable all it				*/
 /*--------------------------------------------------------------*/
 
-#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
+#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
   #define INTH_ENABLEALLIT { \
     * (volatile unsigned short *) INTH_MASK_REG1 = 0x0000; \
     * (volatile unsigned short *) INTH_MASK_REG2 = 0x0000; \
@@ -174,15 +176,11 @@
   * (volatile unsigned short *) INTH_MASK_REG1 = 0xffff; \
   * (volatile unsigned short *) INTH_MASK_REG2 = 0xffff; \
   }
-#elif (CHIPSET == 12)
-  #define INTH_DISABLEALLIT { \
-  * (volatile unsigned short *) INTH_MASK_REG1 = 0xffff; \
-  * (volatile unsigned short *) INTH_MASK_REG2 = 0xffff; \
-  }
 #else
   #define INTH_DISABLEALLIT (* (volatile unsigned short *) INTH_MASK_REG = 0xffff)
 #endif
 
+
 /*--------------------------------------------------------------*/
 /*  INTH_CLEAR()						*/
 /*--------------------------------------------------------------*/
@@ -191,6 +189,7 @@
 /* Functionality :valid next it					*/
 /*--------------------------------------------------------------*/
 
+
 #define INTH_CLEAR (* (volatile SYS_UWORD16 *) INTH_CTRL_REG = 0x0003)
 
 
@@ -204,12 +203,12 @@
 
 #define INTH_VALIDNEXT (intARM)( * (volatile SYS_UWORD16 *) INTH_CTRL_REG |= (1 << intARM))
 
-#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
+#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
   /*--------------------------------------------------------------*/
   /*  INTH_RESETALLIT()                                           */
   /*--------------------------------------------------------------*/
-  /* Parameters : None                                            */
-  /* Return     :	none                                          */
+  /* Parameters :  None                                            */
+  /* Return     :  None                                           */
   /* Functionality :Reset the inth it register                    */
   /*--------------------------------------------------------------*/
 
@@ -219,9 +218,26 @@
   }  
 #endif
 
+
+#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
+  /*-------------------------------------------------------------*/
+  /*   INTH_RESETONEIT()                                         */
+  /*-------------------------------------------------------------*/
+  /* Parameters : Num of the IT to reset                         */
+  /* Return     : None                                           */
+  /* Functionality : Reset one IT of the inth IT register        */
+  /*-------------------------------------------------------------*/    
+  #define INTH_RESETONEIT(it) ( \
+    (it<16) ? (* (volatile unsigned short *) INTH_IT_REG1 &= ~(1 << it)) : \
+              (* (volatile unsigned short *) INTH_IT_REG2 &= ~(1 << (it-16))) \
+			       )
+#else  // CHIPSET == 2,3
+  #define INTH_RESETONEIT(it) (* (volatile unsigned short *) INTH_IT_REG &= ~(1 << it))
+#endif // CHIPSET
+
 /* Prototypes */
 
-#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
+#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
   unsigned long INTH_GetPending (void);
   unsigned long INTH_ResetIT (void);
 #else
@@ -231,3 +247,7 @@
 
 unsigned short INTH_Ack (int);
 void INTH_InitLevel (int, int, int, int);
+
+
+#endif /* endif chipset != 12 */
+
--- a/nuc-fw/bsp/iq.h	Fri Sep 13 17:00:09 2013 +0000
+++ b/nuc-fw/bsp/iq.h	Sat Oct 19 18:59:34 2013 +0000
@@ -79,6 +79,9 @@
 #endif
 #define IQ_ULPD_GAUGING         11
 #define IQ_EXT                  12
+#if ((CHIPSET == 10) || (CHIPSET == 11))
+  #define IQ_API  15 
+#endif // (CHIPSET == 10) || (CHIPSET == 11)
 #if (CHIPSET == 12)
   #define IQ_ARMIO              16
 #else
@@ -156,6 +159,7 @@
 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
   void IQ_RtcA_Handler(void);
   void IQ_GsmTim_Handler(void);
+  void IQ_ApiHandler(void);
 #else
   void IQ_RtcA_GsmTim_Handler(void);
 #endif
--- a/nuc-fw/bsp/timer.h	Fri Sep 13 17:00:09 2013 +0000
+++ b/nuc-fw/bsp/timer.h	Sat Oct 19 18:59:34 2013 +0000
@@ -86,6 +86,6 @@
 void        TM_DisableTimer (int timerNum);
 
 SYS_UWORD16 TIMER_Read (unsigned short);
-inline unsigned short TIMER_WriteValue (SYS_UWORD16);
-inline unsigned short TIMER_ReadValue (void);
+void TIMER_WriteValue (SYS_UWORD16);
+unsigned short TIMER_ReadValue (void);
 
--- a/nuc-fw/bsp/timer1.h	Fri Sep 13 17:00:09 2013 +0000
+++ b/nuc-fw/bsp/timer1.h	Sat Oct 19 18:59:34 2013 +0000
@@ -70,6 +70,6 @@
 
 void Dtimer1_Init_cntl (SYS_UWORD16 St, SYS_UWORD16 Reload, SYS_UWORD16 clockScale, SYS_UWORD16 clkon);
 
-SYS_UWORD16 Dtimer1_WriteValue (SYS_UWORD16 value);
+void Dtimer1_WriteValue (SYS_UWORD16 value);
 
 SYS_UWORD16 Dtimer1_ReadValue (void);
--- a/nuc-fw/bsp/timer2.h	Fri Sep 13 17:00:09 2013 +0000
+++ b/nuc-fw/bsp/timer2.h	Sat Oct 19 18:59:34 2013 +0000
@@ -71,6 +71,6 @@
 
 void Dtimer2_Init_cntl (SYS_UWORD16 St, SYS_UWORD16 Reload, SYS_UWORD16 clockScale, SYS_UWORD16 clkon);
 
-SYS_UWORD16 Dtimer2_WriteValue (SYS_UWORD16 value);
+void Dtimer2_WriteValue (SYS_UWORD16 value);
 
 SYS_UWORD16 Dtimer2_ReadValue (void);