FreeCalypso > hg > freecalypso-tools
annotate loadtools/scripts/pirelli.init @ 146:1782fbfa4860
rftablewr.c: agc-table write: eliminate leading space in the output
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Mon, 27 Feb 2017 05:25:36 +0000 |
parents | e7502631a0f9 |
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e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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1 # This phone has 3 memory chip selects: |
e7502631a0f9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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2 # |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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3 # nCS0: flash chip select 1 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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4 # nCS1: RAM chip select |
e7502631a0f9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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5 # nCS3: flash chip select 2 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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6 # |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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7 # All 3 chip select lines go to the same physical IC, a RAM/flash MCP. |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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8 # We set WS=4 for all 3 here, copying what OsmocomBB does. The access |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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9 # time listed in the datasheet is 70 ns for both RAM and flash, and per |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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10 # my math setting WS=3 *might* work, but it could be marginal, so let's |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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11 # play it safe for now. |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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12 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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13 w16 fffffb00 00A4 |
e7502631a0f9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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14 w16 fffffb02 00A4 |
e7502631a0f9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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15 w16 fffffb06 00A4 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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16 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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17 # We also need to switch the CS4/ADD22 pin from its default function |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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18 # of CS4 to the needed ADD22. |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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19 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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20 w16 fffef006 0008 |
e7502631a0f9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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21 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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22 # With this phone all Calypso serial access always goes through the |
e7502631a0f9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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23 # CP2102 usb2serial IC inside the phone itself, which is programmed |
e7502631a0f9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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24 # to support the high non-standard baud rates. So we can safely |
e7502631a0f9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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25 # switch to 812500 baud unconditionally. |
e7502631a0f9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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26 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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27 baud 812500 |