FreeCalypso > hg > freecalypso-tools
annotate doc/Flash-write-protection @ 1008:2b4c3e0f73fc
doc/High-speed-serial: update for current situation
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 10 Dec 2023 23:42:12 +0000 |
parents | 30fad2b3afd2 |
children | 11391cb6bdc0 |
rev | line source |
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doc/Flash-write-protection: new article
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1 Some Calypso-based GSM MS designs (phones, modems, development boards) use |
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doc/Flash-write-protection: new article
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2 AMD-style (Spansion or Samsung) flash chips, while others use Intel flash. |
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3 In the case of Calypso devices that use Spansion or Samsung flash chips, all of |
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4 those chips support a rarely used feature: an ability to write-protect selected |
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5 flash sectors, disallowing erase and program operations in those areas. With |
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6 earlier AMD-style flash chips (actual AMD-branded ones prior to introduction of |
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7 Spansion brand, as well as Samsung K5A32xx used in Openmoko devices) this |
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8 sector-level write protection can only be applied or lifted by way of external |
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9 programming equipment, executing special commands with a high voltage applied |
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10 to one of the pins - hence when the chip resides on a product board, no new |
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11 sector locks can be applied. (We are not aware of any Calypso GSM device manuf |
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12 who locked some flash sectors and then populated the chip onto the board in |
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13 that state.) |
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14 |
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15 With newer Spansion and Samsung flash families, however, sector locks became |
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doc/Flash-write-protection: new article
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16 more easily accessible: they have Persistent Protection Bits (PPBs) which can |
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17 be programmed (locking a sector or a group of sectors) and erased (removing all |
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18 such locks) in-system under normal operating conditions, using only special |
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19 software commands. These flash chips also have "hard" locking modes: a Password |
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20 Sector Protection mode in which PPBs can only be modified after feeding a |
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21 matching 64-bit key to the chip, and an OTP "master lock" mode in which the |
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22 ability to erase PPBs is irreversibly disabled, locking all write-protected |
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23 sectors forever - but so far we (FreeCalypso community) have not yet encountered |
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24 any devices in which any of these "hard" locks have been activated. There is, |
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25 however, at least one Calypso-based phone out there (Sony Ericsson K2x0 family) |
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26 in which the shipping state of the device includes some flash sector locks - |
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27 but these locks are of the "soft" kind, removable by performing a PPB erase |
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28 operation which is not further blocked. |
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29 |
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30 fc-loadtool support for sector write-protection |
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31 =============================================== |
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32 |
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33 As of fc-host-tools-r21, fc-loadtool provides the following facilities in |
30fad2b3afd2
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34 relation to sector write-protection features on AMD-style flash chips: |
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35 |
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36 * flash lock-state command is available when operating on those flash chips for |
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37 which we've implemented the necessary table, listing how sectors are grouped |
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38 for the purpose of write protection, how they are grouped for the purpose of |
30fad2b3afd2
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39 lock status retrieval via Autoselect read mode, and what additional lock |
30fad2b3afd2
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40 status words should be checked. We have implemented the necessary knowledge |
30fad2b3afd2
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41 tables for all chips on which we support PPB manipulation (see below), but |
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42 also for some chips on which sector lock state can be modified only by high- |
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43 voltage methods - on the latter chips we can examine the lock state, but not |
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44 modify it. |
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45 |
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46 * flash ppb-* commands actively alter sector write protection state by |
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47 programming and erasing PPBs on those Spansion and Samsung flash chips that |
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48 allow these PPB alterations by software commands alone (without high-voltage |
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49 circuits) and for which we have implemented the necessary knowledge tables. |
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50 The set of flash chips for which we have implemented these active commands is |
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51 a proper subset of those for which we have implemented flash lock-state |
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52 retrieval. |
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53 |
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54 These commands are primarily aimed at unlocking flash regions that have been |
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55 write-protected by previous parties. It is very helpful, however, to understand |
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56 some theory before using these commands, which the present document aims to |
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57 explain. |
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58 |
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59 How PPBs work |
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60 ============= |
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61 |
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62 Spansion and Samsung flash chips that feature PPBs have one PPB per sector or |
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63 per sector group - some sectors are aggregated into groups (of 4 sectors max) |
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64 for the purpose of write protection control. All of these PPBs are contained |
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65 in one special-purpose non-volatile memory element inside the flash chip, and |
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66 this NV memory element behaves like a little flash sector of its own: it has a |
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67 program operation, affecting each PPB individually, and an erase operation that |
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68 affects all PPBs across the chip at once. (See How-flash-really-works article |
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69 for an explanation of program and erase operations.) The programmed state of a |
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70 PPB corresponds to the associated flash sector or sector group being locked |
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71 (write-protected), and the erased state of a PPB corresponds to the flash |
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72 location being unlocked (free to erase and program at will). |
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73 |
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74 fc-loadtool commands for manipulating PPBs are flash ppb-program and flash |
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75 ppb-erase-all; they are named in this manner (as opposed to a naming scheme |
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76 based on "lock/unlock" or "protect/unprotect") to emphasize the physical nature |
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77 of what they actually do in the flash chip. flash ppb-program command (or |
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78 flash2 ppb-program for the second bank of 16 MiB flash chips) addresses a |
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79 specific sector and programs that sector's PPB, causing the sector to become |
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80 write-protected; flash ppb-erase-all erases all PPBs across the flash chip, |
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81 causing the entire main flash array to become unlocked for write operations. |
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82 |
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83 The internal implementation of these PPB manipulation commands is very different |
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84 between PL-J and PL-N flash types, as required by the respective flash chip |
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85 families presenting a very different type of command interface for PPB |
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86 operations. The command interface implemented on Spansion PL-J family and at |
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87 least some Samsung flash chips (K5L29xx in particular) exposes the raw physics |
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88 of the flash (see How-flash-really-works article) to the user for PPB |
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89 operations, requiring flashing software tool developers to understand all of |
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90 that theory and implement it in practice. OTOH, the command interface for PPB |
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91 program and erase operations implemented on Spansion PL-N family (of which only |
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92 PL129N is usable with Calypso) brings these special operations into harmony with |
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93 ordinary flash programming and erasure procedures. We don't know (and may never |
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94 know) if Spansion aimed to simplify life for flash low-level driver implementors |
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95 or if internal advancements from PL-J to PL-N flash necessitated some changes |
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96 in physics-level program/erase algorithms and Spansion didn't feel like exposing |
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97 the internal details of their newer flash - but the practical implication for us |
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98 is that we had to implement two different code paths to support both ways of |
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99 performing these operations, as we need to support all flash chip types that are |
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100 found in Calypso GSM devices of different ages. |
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101 |
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102 It also needs to be noted that at least in Spansion PL-J and Samsung flash chips |
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103 the special non-volatile memory element that holds PPBs has a *very* limited |
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104 number of program-erase cycles: the datasheets we were able to find give a limit |
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105 of 100 (1e2) cycles for this special NV memory element, compared to 1e5 cycles |
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106 promised by the same datasheets for the main flash array. So please beware, |
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107 and avoid needlessly cycling these write protection bits. |