annotate rvinterf/include/bsim_etm_cmd.h @ 922:3152e23399a2

document SE K2x0 FFS quirks and our support for them
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 02 Jan 2023 00:50:19 +0000
parents bc1e150f5bd9
children
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bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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1 /*
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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2 * This header file defines ETM commands that can be sent from a
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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3 * development host to FCHG operating in BSIM mode.
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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4 */
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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5
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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6 #ifndef __BSIM_ETM_CMD_H
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7 #define __BSIM_ETM_CMD_H
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9 /* ETM_BSIM command opcodes */
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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10 #define BSIM_CMD_QUERY 0x00
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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11 #define BSIM_CMD_DISCHARGE 0x01 /* 1 byte with battery % follows */
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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12 #define BSIM_CMD_CHG_START 0x02
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13 #define BSIM_CMD_CHG_CI2CV 0x03
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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14 #define BSIM_CMD_CHG_COMPLETE 0x04
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15 #define BSIM_CMD_SET_ICHG 0x05 /* 2 bytes of Ichg value follow */
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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16 #define BSIM_CMD_START_ENABLE 0x06 /* 1 byte with flag follows */
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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17
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18 /* status response codes */
bc1e150f5bd9 rvinterf/include/bsim_etm_cmd.h: copy from FC Tourmaline
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19 #define BSIM_STAT_OK 0x00
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20 #define BSIM_ERR_BAD_CMD 0x02
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21 #define BSIM_ERR_WRONG_STATE 0x03
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22 #define BSIM_ERR_INV_PERCENT 0x04
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23 #define BSIM_ERR_INV_DISCHARGE 0x05
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24
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25 #endif /* include guard */