FreeCalypso > hg > freecalypso-tools
annotate target-utils/libbase/abbdrv.c @ 988:5a6019ed7e72
pln-ppb-test: implement read-id
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sun, 03 Dec 2023 00:04:18 +0000 |
parents | a04a145098f1 |
children |
rev | line source |
---|---|
0
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1 /* Driver for Analog Baseband Circuit (TWL3025) */ |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2 /* lifted from OsmocomBB and ported to FreeCalypso target-utils environment */ |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4 /* (C) 2010 by Harald Welte <laforge@gnumonks.org> |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5 * |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
6 * All Rights Reserved |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
7 * |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
8 * This program is free software; you can redistribute it and/or modify |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
9 * it under the terms of the GNU General Public License as published by |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
10 * the Free Software Foundation; either version 2 of the License, or |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
11 * (at your option) any later version. |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
12 * |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
13 * This program is distributed in the hope that it will be useful, |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
16 * GNU General Public License for more details. |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
17 * |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
18 * You should have received a copy of the GNU General Public License along |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
19 * with this program; if not, write to the Free Software Foundation, Inc., |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
21 * |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
22 */ |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
23 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
24 #include "types.h" |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
25 #include "abbdefs.h" |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
26 |
499
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
27 /* TWL3025, modified for page 2 support */ |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
28 #define REG_PAGE(n) ((n) >> 6) |
0
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
29 #define REG_ADDR(n) ((n) & 0x1f) |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
30 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
31 #define TWL3025_DEV_IDX 0 /* On the SPI bus */ |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
32 #define TWL3025_TSP_DEV_IDX 0 /* On the TSP bus */ |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
33 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
34 int abb_state_initdone, abb_state_page; |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
35 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
36 void |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
37 abb_reg_write(reg, data) |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
38 { |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
39 u16 tx; |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
40 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
41 if (reg != PAGEREG && REG_PAGE(reg) != abb_state_page) |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
42 abb_select_page(REG_PAGE(reg)); |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
43 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
44 tx = ((data & 0x3ff) << 6) | (REG_ADDR(reg) << 1); |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
45 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
46 spi_xfer(TWL3025_DEV_IDX, 16, &tx, 0); |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
47 } |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
48 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
49 u16 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
50 abb_reg_read(reg) |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
51 { |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
52 u16 tx, rx; |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
53 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
54 if (REG_PAGE(reg) != abb_state_page) |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
55 abb_select_page(REG_PAGE(reg)); |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
56 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
57 tx = (REG_ADDR(reg) << 1) | 1; |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
58 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
59 /* A read cycle contains two SPI transfers */ |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
60 spi_xfer(TWL3025_DEV_IDX, 16, &tx, &rx); |
496
3d73d4d3527f
target-utils: removed osmo_delay_ms() from ABB access code
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
61 /* delay of seven 13MHz cycles */ |
3d73d4d3527f
target-utils: removed osmo_delay_ms() from ABB access code
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
62 wait_ARM_cycles(7); |
0
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
63 spi_xfer(TWL3025_DEV_IDX, 16, &tx, &rx); |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
64 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
65 rx >>= 6; |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
66 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
67 return rx; |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
68 } |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
69 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
70 /* Switch the register page of the TWL3025 */ |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
71 abb_select_page(page) |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
72 { |
499
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
73 switch (page) { |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
74 case 0: |
0
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
75 abb_reg_write(PAGEREG, 1 << 0); |
499
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
76 break; |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
77 case 1: |
0
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
78 abb_reg_write(PAGEREG, 1 << 1); |
499
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
79 break; |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
80 case 2: |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
81 /* not documented in datasheet, learned from TCS211 code */ |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
82 abb_reg_write(PAGEREG, 1 << 4); |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
83 break; |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
84 } |
0
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
85 abb_state_page = page; |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
86 return(0); |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
87 } |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
88 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
89 abb_init() |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
90 { |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
91 if (abb_state_initdone) |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
92 return(0); |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
93 spi_init(); |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
94 abb_select_page(0); |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
95 /* CLK13M enable */ |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
96 abb_reg_write(TOGBR2, TOGBR2_ACTS); |
496
3d73d4d3527f
target-utils: removed osmo_delay_ms() from ABB access code
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
97 /* ABB_Wait_IBIC_Access() delay of 210 us */ |
3d73d4d3527f
target-utils: removed osmo_delay_ms() from ABB access code
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
98 wait_ARM_cycles(210 * 13); |
0
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
99 /* for whatever reason we need to do this twice */ |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
100 abb_reg_write(TOGBR2, TOGBR2_ACTS); |
496
3d73d4d3527f
target-utils: removed osmo_delay_ms() from ABB access code
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
101 /* ABB_Wait_IBIC_Access() delay of 210 us */ |
3d73d4d3527f
target-utils: removed osmo_delay_ms() from ABB access code
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
102 wait_ARM_cycles(210 * 13); |
0
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
103 abb_state_initdone = 1; |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
104 return(1); |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
105 } |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
106 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
107 void |
499
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
108 abb_unlock_page2() |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
109 { |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
110 abb_reg_write(TAPCTRL, 0x01); |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
111 abb_reg_write(TAPREG, 0x1B); |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
112 } |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
113 |
44a1de4264d8
target-utils: added support for secret register page 2 of Iota ABB
Mychaela Falconia <falcon@freecalypso.org>
parents:
497
diff
changeset
|
114 void |
0
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
115 abb_power_off() |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
116 { |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
117 abb_init(); |
500
a04a145098f1
target-utils: poweroff command does VRPCAUX cleanup for nTESTRESET
Mychaela Falconia <falcon@freecalypso.org>
parents:
499
diff
changeset
|
118 /* |
a04a145098f1
target-utils: poweroff command does VRPCAUX cleanup for nTESTRESET
Mychaela Falconia <falcon@freecalypso.org>
parents:
499
diff
changeset
|
119 * If we booted via nTESTRESET, we need to clean up some state |
a04a145098f1
target-utils: poweroff command does VRPCAUX cleanup for nTESTRESET
Mychaela Falconia <falcon@freecalypso.org>
parents:
499
diff
changeset
|
120 * in a secret undocumented Iota register before we do the DEVOFF, |
a04a145098f1
target-utils: poweroff command does VRPCAUX cleanup for nTESTRESET
Mychaela Falconia <falcon@freecalypso.org>
parents:
499
diff
changeset
|
121 * otherwise subsequent switch-on via regular PWON button |
a04a145098f1
target-utils: poweroff command does VRPCAUX cleanup for nTESTRESET
Mychaela Falconia <falcon@freecalypso.org>
parents:
499
diff
changeset
|
122 * won't work correctly. |
a04a145098f1
target-utils: poweroff command does VRPCAUX cleanup for nTESTRESET
Mychaela Falconia <falcon@freecalypso.org>
parents:
499
diff
changeset
|
123 */ |
a04a145098f1
target-utils: poweroff command does VRPCAUX cleanup for nTESTRESET
Mychaela Falconia <falcon@freecalypso.org>
parents:
499
diff
changeset
|
124 abb_unlock_page2(); |
a04a145098f1
target-utils: poweroff command does VRPCAUX cleanup for nTESTRESET
Mychaela Falconia <falcon@freecalypso.org>
parents:
499
diff
changeset
|
125 abb_reg_write(VRPCAUX, 0x07); |
0
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
126 serial_flush(); |
500
a04a145098f1
target-utils: poweroff command does VRPCAUX cleanup for nTESTRESET
Mychaela Falconia <falcon@freecalypso.org>
parents:
499
diff
changeset
|
127 abb_reg_write(VRPCDEV, 0x01); /* DEVOFF */ |
497
74610c4f10f7
target-utils: added 10 ms delay at the end of abb_power_off()
Mychaela Falconia <falcon@freecalypso.org>
parents:
496
diff
changeset
|
128 /* |
74610c4f10f7
target-utils: added 10 ms delay at the end of abb_power_off()
Mychaela Falconia <falcon@freecalypso.org>
parents:
496
diff
changeset
|
129 * TWL3025 datasheet seems to indicate that the time for the DEVOFF |
74610c4f10f7
target-utils: added 10 ms delay at the end of abb_power_off()
Mychaela Falconia <falcon@freecalypso.org>
parents:
496
diff
changeset
|
130 * command to take effect is 5 cycles of the 32.768 kHz clock. |
74610c4f10f7
target-utils: added 10 ms delay at the end of abb_power_off()
Mychaela Falconia <falcon@freecalypso.org>
parents:
496
diff
changeset
|
131 * We'll do an ARM-timed delay of 10 ms before returning from |
74610c4f10f7
target-utils: added 10 ms delay at the end of abb_power_off()
Mychaela Falconia <falcon@freecalypso.org>
parents:
496
diff
changeset
|
132 * this function. |
74610c4f10f7
target-utils: added 10 ms delay at the end of abb_power_off()
Mychaela Falconia <falcon@freecalypso.org>
parents:
496
diff
changeset
|
133 */ |
74610c4f10f7
target-utils: added 10 ms delay at the end of abb_power_off()
Mychaela Falconia <falcon@freecalypso.org>
parents:
496
diff
changeset
|
134 wait_ARM_cycles(13000 * 10); |
0
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
135 } |