FreeCalypso > hg > freecalypso-tools

annotate target-utils/simagent/tx.c @ 967:6bf473f77fc4

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
fcup-smsend: support backslash escapes in UCS-2 mode too
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 01 Sep 2023 16:43:35 +0000
parents 289733ff272b
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
776
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 /*
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 * This module implements transmission of bytes toward the SIM.
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 */
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 #include "types.h"
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 #include "simregs.h"
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 extern u16 conf1_reg;
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10 send_to_sim(bytes, count)
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11 u8 *bytes;
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12 unsigned count;
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13 {
780
8a94593fb7ef simagent: Tx delays reduced in spenh mode
Mychaela Falconia <falcon@freecalypso.org>
parents: 778
diff changeset
14 unsigned n, timeout, delay;
776
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15
780
8a94593fb7ef simagent: Tx delays reduced in spenh mode
Mychaela Falconia <falcon@freecalypso.org>
parents: 778
diff changeset
16 if (conf1_reg & SIM_CONF1_ETU)
8a94593fb7ef simagent: Tx delays reduced in spenh mode
Mychaela Falconia <falcon@freecalypso.org>
parents: 778
diff changeset
17 delay = 6000;
8a94593fb7ef simagent: Tx delays reduced in spenh mode
Mychaela Falconia <falcon@freecalypso.org>
parents: 778
diff changeset
18 else
8a94593fb7ef simagent: Tx delays reduced in spenh mode
Mychaela Falconia <falcon@freecalypso.org>
parents: 778
diff changeset
19 delay = 30000;
776
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_TXRX;
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21 if (count == 1)
780
8a94593fb7ef simagent: Tx delays reduced in spenh mode
Mychaela Falconia <falcon@freecalypso.org>
parents: 778
diff changeset
22 wait_ARM_cycles(delay);
778
3ba64341137b simagent: bare Tx works with extra delays
Mychaela Falconia <falcon@freecalypso.org>
parents: 776
diff changeset
23 (void) SIMREGS.it;
776
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
24 for (n = 0; ; ) {
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
25 SIMREGS.dtx = bytes[n++];
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
26 if (n == count) {
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
27 SIMREGS.conf1 = conf1_reg &= ~SIM_CONF1_TXRX;
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
28 return(0);
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
29 }
780
8a94593fb7ef simagent: Tx delays reduced in spenh mode
Mychaela Falconia <falcon@freecalypso.org>
parents: 778
diff changeset
30 wait_ARM_cycles(delay);
776
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
31 for (timeout = 12000; timeout; timeout--)
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
32 if (SIMREGS.it & SIM_IT_ITTX)
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
33 break;
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
34 if (!timeout) {
778
3ba64341137b simagent: bare Tx works with extra delays
Mychaela Falconia <falcon@freecalypso.org>
parents: 776
diff changeset
35 printf("ERROR: SIM interface Tx timeout on byte %u\n",
3ba64341137b simagent: bare Tx works with extra delays
Mychaela Falconia <falcon@freecalypso.org>
parents: 776
diff changeset
36 n);
776
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
37 return(-1);
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
38 }
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
39 }
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
40 }
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
41
781
289733ff272b simagent/tx.c: forgot void on the cmd_tx() function
Mychaela Falconia <falcon@freecalypso.org>
parents: 780
diff changeset
42 void
776
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
43 cmd_tx(argstr)
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
44 char *argstr;
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
45 {
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
46 u8 bytes[5];
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
47 int rc;
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
48
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
49 rc = decode_hex_string_arg(argstr, bytes, sizeof bytes);
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
50 if (rc < 0)
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
51 return;
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
52 if (rc == 0) {
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
53 printf("ERROR: empty hex string argument\n");
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
54 return;
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
55 }
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
56 send_to_sim(bytes, rc);
fac3176de18d simagent: bare Tx implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
57 }