annotate loadtools/scripts/compal.init @ 497:74610c4f10f7

target-utils: added 10 ms delay at the end of abb_power_off() The deosmification of the ABB access code (replacement of osmo_delay_ms() bogus delays with correctly-timed ones, which are significantly shorter) had one annoying side effect: when executing the poweroff command from any of the programs, one last '=' prompt character was being sent (and received by the x86 host) as the Calypso board powers off. With delays being shorter now, the abb_power_off() function was returning and the standalone program's main loop was printing its prompt before the Iota chip fully executed the switch-off sequence! I thought about inserting an endless tight loop at the end of the abb_power_off() function, but the implemented solution of a 10 ms delay is a little nicer IMO because if the DEVOFF operation doesn't happen for some reason in a manual hacking scenario, there won't be an artificial blocker in the form of a tight loop keeping us from further poking around.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 25 May 2019 20:44:05 +0000
parents ac48ed111d6a
children b0f9d38bfd9e
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ac48ed111d6a loadtools/scripts/compal.init: updated comments for new understanding
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1 # Set WS=3 for both nCS0 and nCS1. This configuration is used by all official
ac48ed111d6a loadtools/scripts/compal.init: updated comments for new understanding
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2 # C11x, C139/140 and SE J100 firmwares that have been examined, i.e., by the
ac48ed111d6a loadtools/scripts/compal.init: updated comments for new understanding
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3 # official firmwares for all Compal models to which this init script applies.
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ac48ed111d6a loadtools/scripts/compal.init: updated comments for new understanding
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8 # On most targets we use the alternate nCS0 mapping at 0x03000000 to access
ac48ed111d6a loadtools/scripts/compal.init: updated comments for new understanding
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9 # the full flash bank even though the boot ROM is mapped at 0, overlapping
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10 # the first 8 KiB of flash. However, the Calypso chip (all versions we work
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11 # with) has a little design bug in this part of the silicon: the alternate
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12 # nCS0 mapping at 0x03000000 works only when the debug visibility bit in the
ac48ed111d6a loadtools/scripts/compal.init: updated comments for new understanding
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13 # API-RHEA control register (bit 6 in the FFFF:FB0E register) is set, and
ac48ed111d6a loadtools/scripts/compal.init: updated comments for new understanding
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14 # does not work otherwise. This bit is initially set as the Calypso comes
ac48ed111d6a loadtools/scripts/compal.init: updated comments for new understanding
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15 # out of reset, and on most platforms we gain loadtool access via the boot ROM,
ac48ed111d6a loadtools/scripts/compal.init: updated comments for new understanding
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16 # hence the problem does not occur - but on these Compal targets we gain
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17 # loadtool access either through Compal's bootloader or via tfc139, and in
ac48ed111d6a loadtools/scripts/compal.init: updated comments for new understanding
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18 # both cases Compal's fw (either the full fw or the bootloader part) has
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19 # already set the register in question to the runtime operational value of
ac48ed111d6a loadtools/scripts/compal.init: updated comments for new understanding
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20 # 0x2A (unchanged from TI's TCS211 reference fw), with the debug visibility
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21 # bit cleared, hence the 0x03000000 flash mapping no longer works.
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22 #
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23 # We could write into the FFFF:FB0E register here, restore the Calypso power-up
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24 # state and use the 0x03000000 mapping like on other platforms, but the problem
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25 # of the mapping not working as expected was first encountered in 2014 when we
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26 # started working on Compal targets, whereas the root cause described above was
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27 # only discovered in 2019. For now we are keeping the original workaround from
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28 # 2014: we set the FFFF:FB10 register to map the flash (not the boot ROM)
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29 # to address 0, and use that "main" mapping instead of the alternate one.
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