FreeCalypso > hg > freecalypso-tools
annotate rvinterf/old/before-rvinterf/txpkt.h @ 505:7bf0d909c87e
fc-loadtool flash ID check: change of reset after the check logic
This change only affects those flash configurations that have ID checks
enabled. The logic for resetting the flash after the ID check has been
changed as follows:
1) If the check fails, we return without attempting to reset the flash.
2) If the check is successful, we reset the flash using the configured
method (could be AMD or Intel or Intel W30) instead of always doing an
AMD flash reset as the original code did.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Mon, 27 May 2019 19:58:01 +0000 |
parents | e7502631a0f9 |
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rev | line source |
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e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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1 /* |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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2 * For sizing our buffers etc in rvinterf, we need a limit on the size of |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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3 * message packets we can send to the target. As it happens, the packet |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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4 * Rx code in RVT on the target side also has a limit (quite naturally, |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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5 * as it needs to use a static buffer to reassemble incoming packets as |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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6 * they arrive at the UART in unpredictable interrupt-sized chunks), so |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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7 * we set our limit to match that in RVT. |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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8 */ |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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9 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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10 #define MAX_PKT_TO_TARGET 255 |
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initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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11 |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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12 /* |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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13 * The above limit definition counts all bytes between the opening and |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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14 * closing STX flags, but not DLEs inserted for binary transparency. |
e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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15 */ |