FreeCalypso > hg > freecalypso-tools
annotate loadtools/scripts/compal.config @ 60:87cb03b35f77
target-utils: long-overdue s/mpffs/tiffs/ and s/MPFFS/TIFFS/ rename
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Wed, 26 Oct 2016 15:52:14 +0000 |
parents | e7502631a0f9 |
children | 49ee210fc4fb |
rev | line source |
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Mychaela Falconia <falcon@freecalypso.org>
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1 # This configuration is intended to be applicable to all of C11x, C123, |
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Mychaela Falconia <falcon@freecalypso.org>
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2 # C139 and C140. The "plain" version of compalstage selected below |
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Mychaela Falconia <falcon@freecalypso.org>
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3 # should work for all C11x/123; it will also work on C139/140 phones |
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Mychaela Falconia <falcon@freecalypso.org>
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4 # that had the simpler boot code flashed into them, as will be used for |
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Mychaela Falconia <falcon@freecalypso.org>
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5 # FreeCalypso. When running loadtools with this config on C139/140 |
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Mychaela Falconia <falcon@freecalypso.org>
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6 # phones that still have the "official" fw in them, one will need to |
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Mychaela Falconia <falcon@freecalypso.org>
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7 # specify -h compal -c 1003 to use the inefficient ~15 KiB version of |
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Mychaela Falconia <falcon@freecalypso.org>
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8 # compalstage. |
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Mychaela Falconia <falcon@freecalypso.org>
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9 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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10 compal-stage plain |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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11 |
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Mychaela Falconia <falcon@freecalypso.org>
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12 # Whether we are breaking in through compalstage (as above) or through |
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Mychaela Falconia <falcon@freecalypso.org>
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13 # tfc139, the re-enabled Calypso boot ROM is used to load our loadagent |
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Mychaela Falconia <falcon@freecalypso.org>
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14 # into IRAM. The boot ROM will autodetect the Calypso input clock as |
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Mychaela Falconia <falcon@freecalypso.org>
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15 # 26 MHz (physical reality) when entered through compalstage, or as |
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Mychaela Falconia <falcon@freecalypso.org>
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16 # 13 MHz when entered through tfc139 - the latter results from the |
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Mychaela Falconia <falcon@freecalypso.org>
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17 # original fw setting bit 7 in the FFFF:FD02 register (VTCXO_DIV2), |
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Mychaela Falconia <falcon@freecalypso.org>
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18 # which the boot ROM does not clear. |
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19 # |
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Mychaela Falconia <falcon@freecalypso.org>
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20 # However, the following configuration will result in the ARM core |
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Mychaela Falconia <falcon@freecalypso.org>
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21 # being clocked at 52 MHz in both cases. |
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22 |
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Mychaela Falconia <falcon@freecalypso.org>
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23 pll-config 4/1 |
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24 rhea-cntl 0x00 |
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Mychaela Falconia <falcon@freecalypso.org>
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25 |
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Mychaela Falconia <falcon@freecalypso.org>
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26 # The remaining settings are carried out via loadagent commands |
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27 init-script compal.init |
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28 |
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29 # Flash: use CFI autodetection, 4 MiB max |
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Mychaela Falconia <falcon@freecalypso.org>
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30 # mapped at 0, see compal.init for the explanation |
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31 flash cfi-4M 0 |
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32 |
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Mychaela Falconia <falcon@freecalypso.org>
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33 boot-reflash-hack 0x820000 0x10000 |
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34 |
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Mychaela Falconia <falcon@freecalypso.org>
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35 # Perform a Iota poweroff when we are done |
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36 exit-mode iota-off |