annotate target-utils/tf-breakin/payload.S @ 538:8b165467f1b7

CHANGES: fc-xram -j addition documented
author Mychaela Falconia <falcon@freecalypso.org>
date Wed, 19 Jun 2019 22:49:50 +0000
parents e7502631a0f9
children
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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1 .text
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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2 .org 0
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Mychaela Falconia <falcon@freecalypso.org>
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3
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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4 @ allow entry in Thumb state
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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5 .code 16
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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6 bx pc
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Mychaela Falconia <falcon@freecalypso.org>
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7 nop
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Mychaela Falconia <falcon@freecalypso.org>
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8
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Mychaela Falconia <falcon@freecalypso.org>
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9 .code 32
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Mychaela Falconia <falcon@freecalypso.org>
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10
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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11 @ set CPSR like mot931c payload does
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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12 msr CPSR_c, #0xd3
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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13 @ disable the watchdog
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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14 ldr r1, =0xfffff802
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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15 mov r0, #0xf5
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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16 strh r0, [r1, #2]
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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17 mov r0, #0xa0
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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18 strh r0, [r1, #2]
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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19 @ MODEM UART
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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20 ldr r6, =0xffff5800
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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21 @ wait for any previous output to flush out
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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22 1: ldrb r0, [r6, #5]
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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23 tst r0, #0x20
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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24 beq 1b
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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25 @ send our indication
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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26 adr r1, outstr
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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27 mov r2, #6
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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28 1: ldrb r0, [r1], #1
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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29 strb r0, [r6]
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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30 subs r2, r2, #1
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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31 bne 1b
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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32 @ wait for this output to go out to the TxD pin
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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33 1: ldrb r0, [r6, #5]
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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34 tst r0, #0x40
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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35 beq 1b
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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36 @ enable the Calypso boot ROM
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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37 ldr r1, =0xFFFFFB10
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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38 mov r2, #0x0100
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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39 strh r2, [r1]
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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40 @ jump to it!
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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41 mov pc, #0
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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42 .ltorg
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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43 outstr: .byte 2,2,2,'O','K',2