FreeCalypso > hg > freecalypso-tools
annotate target-utils/flash-boot-test/uartinit.S @ 1014:961efadd530a default tip
fc-shell TCH DL handler: add support for CSD modes
TCH DL capture mechanism in FC Tourmaline firmware has been extended
to support CSD modes in addition to speech - add the necessary support
on the host tools side.
It needs to be noted that this mechanism in its present state does NOT
provide the debug utility value that was sought: as we learned only
after the code was implemented, TI's DSP has a misfeature in that the
buffer we are reading (a_dd_0[]) is zeroed out when the IDS block
is enabled, i.e., we are reading all zeros and not the real DL bits
we were after. But since the code has already been written, we are
keeping it - perhaps we can do some tests with IDS disabled.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 26 Nov 2024 06:27:43 +0000 |
parents | cc6594a7fc7a |
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rev | line source |
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cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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1 /* |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
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2 * The UART initialization code in this assembly module has been lifted |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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3 * from the disassembly of the Calypso boot ROM, and slightly adapted |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
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4 * for our needs. |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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5 */ |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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6 |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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7 .text |
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target-utils/flash-boot-test: added UART init, needed for mode 1
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8 .code 32 |
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target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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9 .globl uart_init |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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10 |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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11 uart_init: |
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target-utils/flash-boot-test: added UART init, needed for mode 1
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12 stmfd sp!, {r4-r11,lr} |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
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13 @ prepare UART init values |
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target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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14 mov r11, #3 |
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target-utils/flash-boot-test: added UART init, needed for mode 1
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15 mov r5, #0 |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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16 mov r10, #7 @ baud rate divisor for 115200 baud |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
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17 mov r9, #0x80 |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
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18 mov r7, #0xbf |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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19 mov r4, #7 |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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20 @ UART base address |
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target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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21 ldr r6, =uart_base |
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target-utils/flash-boot-test: added UART init, needed for mode 1
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22 ldr r12, [r6] |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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23 add r3, r12, #8 |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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24 @ R3 points to register 8 (MDR1) |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
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25 @ write 07 into it: reset mode |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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26 strb r4, [r3] |
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target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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27 add r0, r12, #3 |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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28 @ R0 points to register 3 (LCR) |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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29 @ write BF into it: map in the extended registers |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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30 strb r7, [r0] |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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31 add r1, r12, #2 |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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32 @ R1 points to register 2: EFR under current mapping |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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33 @ set bit 4: enable enhanced functions |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
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34 ldrb r8, [r1] |
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target-utils/flash-boot-test: added UART init, needed for mode 1
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35 orr r8, r8, #0x10 |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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36 strb r8, [r1] |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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37 @ write 80 into LCR: map in the baud rate divisor registers |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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38 strb r9, [r0] |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
parents:
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39 @ reg 2 (pointed to by R1) is now IIR/FCR |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
parents:
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40 @ write 07 into FCR: FIFOs enabled and cleared, no DMA |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
parents:
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41 strb r4, [r1] |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
parents:
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42 @ write BF into LCR again |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
parents:
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43 strb r7, [r0] |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
parents:
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44 @ load baud rate divisor |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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45 strb r10, [r12] |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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46 strb r5, [r12, #1] |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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47 @ write 03 into LCR: restore normal registers, 8N1 |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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48 strb r11, [r0] |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
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49 @ write 00 into MDR1: plain UART mode |
cc6594a7fc7a
target-utils/flash-boot-test: added UART init, needed for mode 1
Mychaela Falconia <falcon@freecalypso.org>
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50 strb r5, [r3] |
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target-utils/flash-boot-test: added UART init, needed for mode 1
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51 ldmfd sp!, {r4-r11,pc} |