FreeCalypso > hg > freecalypso-tools
annotate target-utils/include/abbdefs.h @ 1014:961efadd530a default tip
fc-shell TCH DL handler: add support for CSD modes
TCH DL capture mechanism in FC Tourmaline firmware has been extended
to support CSD modes in addition to speech - add the necessary support
on the host tools side.
It needs to be noted that this mechanism in its present state does NOT
provide the debug utility value that was sought: as we learned only
after the code was implemented, TI's DSP has a misfeature in that the
buffer we are reading (a_dd_0[]) is zeroed out when the IDS block
is enabled, i.e., we are reading all zeros and not the real DL bits
we were after. But since the code has already been written, we are
keeping it - perhaps we can do some tests with IDS disabled.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 26 Nov 2024 06:27:43 +0000 |
parents | 44a1de4264d8 |
children |
rev | line source |
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499
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target-utils: added support for secret register page 2 of Iota ABB
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1 /* lifted from OsmocomBB, then modified for page 2 support */ |
0
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2 |
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3 #ifndef _TWL3025_H |
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4 #define _TWL3025_H |
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5 |
499
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6 #define PAGE(n) (n << 6) |
0
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7 enum twl3025_reg { |
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8 VRPCCFG = PAGE(1) | 30, |
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9 VRPCDEV = PAGE(0) | 30, |
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10 VRPCMSK = PAGE(1) | 31, |
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11 VRPCMSKABB = PAGE(1) | 29, |
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12 VRPCSTS = PAGE(0) | 31, |
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13 VRPCAUX = PAGE(2) | 30, /* secret undocumented register! */ |
0
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14 /* Monitoring ADC Registers */ |
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15 MADCTRL = PAGE(0) | 13, |
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16 MADCSTAT = PAGE(0) | 24, |
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17 VBATREG = PAGE(0) | 15, |
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18 VCHGREG = PAGE(0) | 16, |
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19 ICHGREG = PAGE(0) | 17, |
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20 VBKPREG = PAGE(0) | 18, |
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21 ADIN1REG = PAGE(0) | 19, |
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22 ADIN2REG = PAGE(0) | 20, |
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23 ADIN3REG = PAGE(0) | 21, |
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24 ADIN4REG = PAGE(0) | 22, |
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25 /* Clock Generator Registers */ |
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26 TOGBR1 = PAGE(0) | 4, |
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27 TOGBR2 = PAGE(0) | 5, |
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28 PWDNRG = PAGE(1) | 9, |
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29 TAPCTRL = PAGE(1) | 19, |
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30 TAPREG = PAGE(1) | 20, |
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31 /* Automatic Frequency Control (AFC) Registers */ |
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32 AUXAFC1 = PAGE(0) | 7, |
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33 AUXAFC2 = PAGE(0) | 8, |
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34 AFCCTLADD = PAGE(1) | 21, |
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35 AFCOUT = PAGE(1) | 22, |
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36 /* Automatic Power Control (APC) Registers */ |
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37 APCDEL1 = PAGE(0) | 2, |
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38 APCDEL2 = PAGE(1) | 26, |
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39 AUXAPC = PAGE(0) | 9, |
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40 APCRAM = PAGE(0) | 10, |
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41 APCOFF = PAGE(0) | 11, |
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42 APCOUT = PAGE(1) | 12, |
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43 /* Auxiliary DAC Control Register */ |
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44 AUXDAC = PAGE(0) | 12, |
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45 /* SimCard Control Register */ |
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46 VRPCSIM = PAGE(1) | 23, |
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47 /* LED Driver Register */ |
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48 AUXLED = PAGE(1) | 24, |
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49 /* Battery Charger Interface (BCI) Registers */ |
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50 CHGREG = PAGE(0) | 25, |
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51 BCICTL1 = PAGE(0) | 28, |
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52 BCICTL2 = PAGE(0) | 29, |
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53 BCICONF = PAGE(1) | 13, |
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54 /* Interrupt and Bus Control (IBIC) Registers */ |
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55 ITMASK = PAGE(0) | 28, |
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56 ITSTATREG = PAGE(0) | 27, /* both pages! */ |
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57 PAGEREG = PAGE(0) | 1, /* both pages! */ |
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58 /* Baseband Codec (BBC) Registers */ |
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59 BULIOFF = PAGE(1) | 2, |
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60 BULQOFF = PAGE(1) | 3, |
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61 BULIDAC = PAGE(1) | 5, |
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62 BULQDAC = PAGE(1) | 4, |
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63 BULGCAL = PAGE(1) | 14, |
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64 BULDATA1 = PAGE(0) | 3, /* 16 words */ |
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65 BBCTRL = PAGE(1) | 6, |
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66 /* Voiceband Codec (VBC) Registers */ |
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67 VBCTRL1 = PAGE(1) | 8, |
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68 VBCTRL2 = PAGE(1) | 11, |
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69 VBPOP = PAGE(1) | 10, |
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70 VBUCTRL = PAGE(1) | 7, |
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71 VBDCTRL = PAGE(0) | 6, |
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72 }; |
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73 #define BULDATA2 BULDATA1 |
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74 |
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75 /* available ADC inputs on IOTA */ |
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76 enum twl3025_dac_inputs {/* === Signal ============================= */ |
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77 MADC_VBAT=0, /* battery voltage / 4 */ |
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78 MADC_VCHG=1, /* charger voltage / 5 */ |
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79 MADC_ICHG=2, /* I-sense amp or CHGREG DAC output */ |
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80 MADC_VBKP=3, /* backup battery voltage / 4 */ |
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81 MADC_ADIN1=4, /* VADCID, sense battery type, not used */ |
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82 MADC_ADIN2=5, /* Temperature sensor in Battery */ |
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83 MADC_ADIN3=6, /* Mode_detect: sense 2.5mm jack insertion */ |
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84 MADC_ADIN4=7, /* RITA: TEMP_SEN */ |
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85 MADC_NUM_CHANNELS=8 |
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86 }; |
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87 |
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88 enum madcstat_reg_bits { /* monitoring ADC status register */ |
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89 ADCBUSY = 0x01 /* if set, a conversion is currently going on */ |
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90 }; |
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91 |
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92 /* BCICTL1 register bits */ |
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93 enum bcictl1_reg_bits { |
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94 MESBAT = 1<<0, /* connect resistive divider for bat voltage */ |
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95 DACNBUF = 1<<1, /* bypass DAC buffer */ |
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96 THSENS0 = 1<<3, /* thermal sensor bias current (ADIN2), bit 0 */ |
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97 THSENS1 = 1<<4, /* "" bit 1 */ |
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98 THSENS2 = 1<<5, /* "" bit 2 */ |
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99 THEN = 1<<6, /* enable thermal sensor bias current (ADIN1) */ |
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100 TYPEN = 1<<7 /* enable bias current for battery type reading */ |
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101 }; |
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102 |
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103 /* BCICTL1 register bits */ |
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104 enum bcictl2_reg_bits { |
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105 CHEN = 1<<0, /* enable charger */ |
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106 CHIV = 1<<1, /* 1=constant current, 0=constant voltage */ |
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107 CHBPASSPA=1<<2, /* full charging of the battery during pulse radio */ |
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108 CLIB = 1<<3, /* calibrate I-to-V amp (short input pins) */ |
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109 CHDISPA = 1<<4, /* disabel charging during pulse radio (???) */ |
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110 LEDC = 1<<5, /* enable LED during charge */ |
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111 CGAIN4 = 1<<6, /* if set, I-to-V amp gain is reduced from 10 to 4 */ |
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112 PREOFF = 1<<7 /* disable battery precharge */ |
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113 }; |
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114 |
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115 enum vrpcsts_reg_bits { |
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116 ONBSTS = 1<<0, /* button push switched on the mobile */ |
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117 ONRSTS = 1<<1, /* RPWON terminal switched on the mobile */ |
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118 ITWSTS = 1<<2, /* ITWAKEUP terminal switched on the mobile */ |
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119 CHGSTS = 1<<3, /* plugging in charger has switched on the mobile */ |
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120 ONREFLT= 1<<4, /* state of PWON terminal after debouncing */ |
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121 ONMRFLT= 1<<5, /* state of RPWON terminal after debouncing */ |
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122 CHGPRES= 1<<6 /* charger is connected */ |
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123 }; |
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124 |
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125 enum togbr2_bits { |
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126 TOGBR2_KEEPR = (1 << 0), /* Clear KEEPON bit */ |
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127 TOGBR2_KEEPS = (1 << 1), /* Set KEEPON bit */ |
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128 TOGBR2_ACTR = (1 << 2), /* Dectivate MCLK */ |
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129 TOGBR2_ACTS = (1 << 3), /* Activate MCLK */ |
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130 TOGBR2_IBUFPTR1 = (1 << 4), /* Initialize pointer of burst buffer 1 */ |
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131 TOGBR2_IBUFPTR2 = (1 << 5), /* Initialize pointer of burst buffer 2 */ |
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132 TOGBR2_IAPCPTR = (1 << 6), /* Initialize pointer of APC RAM */ |
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133 }; |
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134 |
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135 /* How a RAMP value is encoded */ |
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136 #define ABB_RAMP_VAL(up, down) ( ((down & 0x1F) << 5) | (up & 0x1F) ) |
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137 |
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138 enum twl3025_unit { |
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139 TWL3025_UNIT_AFC, |
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140 TWL3025_UNIT_MAD, |
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141 TWL3025_UNIT_ADA, |
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142 TWL3025_UNIT_VDL, |
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143 TWL3025_UNIT_VUL, |
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144 }; |
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145 |
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146 enum twl3025_tsp_bits { |
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147 BULON = 0x80, |
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148 BULCAL = 0x40, |
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149 BULENA = 0x20, |
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150 BDLON = 0x10, |
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151 BDLCAL = 0x08, |
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152 BDLENA = 0x04, |
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153 STARTADC = 0x02, |
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154 }; |
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155 |
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156 #endif |