FreeCalypso > hg > freecalypso-tools
annotate doc/Target-utils @ 527:aa4f70e36cbd
doc/Target-utils: typo fix
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 14 Jun 2019 08:30:54 +0000 |
parents | 6604403aa212 |
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1 FreeCalypso target-utils suite |
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2 ============================== |
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3 |
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4 We have a suite of standalone programs and specialized code pieces that run on |
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5 the Calypso ARM7 processor, but are not regular operational phone or modem |
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6 firmware; this suite of code bits is called target-utils, maintained and |
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7 distributed together with FreeCalypso host tools. The primary reason for the |
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8 coupling between FC host tools and target-utils is that the target-utils suite |
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9 provides the loadagent target program for fc-loadtool and fc-xram host tools, |
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10 as well as compalstage code pieces needed for operating on Compal phones. |
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11 |
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12 Most programs in the target-utils suite are meant to execute out of RAM |
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13 (specifically, the Calypso chip's internal RAM or IRAM for short), loaded and |
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14 run via fc-iram or fc-compalram - they are not meant to be flashed. As of this |
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15 writing, the following run-from-RAM programs are available: |
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16 |
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17 buzplayer Player for buzzer melodies, used by fc-buzplay |
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18 c139explore Mot C139 hardware exploration program |
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19 calversion Calypso version ID tool, primarily for the DSP ROM version |
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20 helloapp Hello-world program |
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21 loadagent Flash manipulation and XRAM loading agent |
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22 pirexplore Pirelli DP-L10 hardware exploration program |
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23 simtest Low-level exerciser for the SIM interface hardware |
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24 |
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25 Aside from c139explore which is built as a binary to be loaded via fc-compalram |
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26 (Compal's bootloader protocol), all of the above programs are built as S-record |
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27 images to be loaded via fc-iram. Once loaded via the respective serial code |
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28 download protocol, each of the listed programs runs interactively, listening |
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29 for and executing commands given over the serial port. The specific set of |
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30 available commands is different for each program as relevant to its function, |
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31 but the command framework is common across the target-utils suite. The command |
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32 interface is text-based, such that each program can be driven manually by a |
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33 human operator once fc-iram or fc-compalram has dropped into the tty pass-thru |
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34 mode, but this same text-based command interface can also be driven by other |
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35 programs: fc-loadtool and fc-xram drive loadagent, and fc-buzplay drives |
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36 buzplayer. |
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37 |
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38 Code architecture and execution environment |
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39 =========================================== |
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40 |
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41 Our target-utils suite is built with the GNU toolchain (gcc+binutils), not TI's |
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42 proprietary TMS470 compiler. Because all of target-utils are meant to run out |
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43 of IRAM rather than flash or XRAM, we compile all code in ARM mode (not Thumb), |
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44 and we build without interworking support (no -mthumb-interwork): the ARMv4T |
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45 architecture implemented by the ARM7TDMI core in the Calypso does not support |
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46 penalty-free ARM/Thumb interworking, thus ARM-only code without interworking |
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47 support is the most efficient option for execution out of IRAM. |
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48 |
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49 Selection of UART for communication |
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50 =================================== |
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51 |
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52 All target-utils programs are interactive, listening for text commands given |
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53 over a serial port. But which UART? The Calypso chip has two UARTs, called |
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54 MODEM and IrDA in the chip docs - which of the two should be used for host |
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55 communication? The answer is a trick original to FreeCalypso: most of our |
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56 target-utils programs that are meant to be loaded via fc-iram expect to be |
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57 loaded specifically via the Calypso boot ROM and not in some other way, and |
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58 they look at some of the IRAM variables left behind by the boot ROM code. The |
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59 boot ROM listens on both UARTs for an interrupt-boot sequence, and once it |
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60 receives that sequence on one of the UARTs, it remembers which UART it was and |
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61 uses that same UART for the rest of the serial code download protocol. We read |
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62 that same variable set by the boot ROM, which depends on the boot ROM version. |
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63 To handle different Calypso boot ROM versions, we read the 16-bit word at 0x1FFE |
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64 (the last 16 bits of the boot ROM image) where TI put the boot ROM version |
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65 number, and we support boot ROM versions 0200 (Calypso C05 rev B silicon) and |
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66 0300 (Calypso C035 silicon). Most target-utils programs won't work (will fail |
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67 to select the UART for communication) if the boot ROM is some unsupported |
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68 version or missing altogether, or if the boot ROM is there, but didn't do the |
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69 loading. |
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70 |
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71 The exceptions are as follows: |
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72 |
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73 * c139explore always uses the MODEM UART as appropriate for Mot C139; |
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74 |
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75 * flash-boot-test (a flashable program described later in this article) always |
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76 uses the IrDA UART; |
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77 |
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78 * helloapp is built in 3 versions: helloapp-bootrom.srec, helloapp-irda.srec |
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79 and helloapp-modem.srec. The first version depends on the boot ROM like |
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80 other programs, the other two versions are built as fixed-IrDA or fixed-MODEM. |
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81 |
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82 Other boot ROM and fc-iram dependencies |
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83 ======================================= |
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84 |
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85 There are two other ways in which target-utils programs that are meant to be |
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86 loaded via fc-iram depend on the Calypso boot ROM: |
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87 |
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88 1) The Calypso gets its clock input from the RF section of the GSM device, and |
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89 the RF block can feed either 13 MHz or 26 MHz to the Calypso - some GSM RF |
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90 transceiver chips require 13 MHz (TI Clara), others require 26 MHz (TI Rita |
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91 and Silabs Aero II), yet others can work with either clock (Silabs Aero+), |
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92 and some use a 26 MHz crystal but have the option of feeding either 13 or |
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93 26 MHz to the Calypso (Aero II). The Calypso initially boots without knowing |
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94 what clock frequency it is running at, but then it needs to be told via a |
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95 register setting what the input clock frequency is, so that all peripherals |
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96 (both GSM-specific and general-purpose) always run at 13 MHz. |
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97 |
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98 When the Calypso boot process is interrupted and diverted to serial code |
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99 download in the boot ROM, the boot ROM code autodetects whether the CLKTCXO |
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100 input runs at 13 MHz or 26 MHz (it tries both register bit settings until |
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101 the serial '<' characters sent by the host at 19200 baud are received |
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102 correctly), and if the CLKTCXO input is 26 MHz, the VCLKOUT_DIV2 bit is set |
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103 in the FFFF:FD02 register. Most of our target-utils programs have no hard- |
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104 coded knowledge of the 13 MHz vs. 26 MHz board hardware configuration and |
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105 rely on the Calypso boot ROM to set the division control bits in the |
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106 FFFF:FD02 register correctly for the autodetected clock. |
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107 |
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108 2) The boot ROM allows the serial download host (fc-iram in our case) to |
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109 configure the Calypso DPLL, allowing the ARM7 core to run at its maximum |
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110 frequency of 52 MHz on Calypso C035 or 39 MHz on the older Calypso C05 |
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111 silicon. None of our target-utils programs do their own DPLL setup, instead |
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112 they run with whatever they were booted with - therefore, in order for the |
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113 IRAM programs to run at their intended fastest speed, the correct -h option |
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114 needs to be given to fc-iram, selecting a hardware parameter file with the |
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115 right pll-config setting. |
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116 |
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117 Delay loop timing |
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118 ================= |
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119 |
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120 There are a few places in target-utils where a delay of some specific duration |
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121 needs to be inserted. In most cases the requirement is for a certain minimum |
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122 delay, with more delay time being harmless except for inefficiency, but there |
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123 is one case (SPCA552E chip initialization in pirexplore) where the delay |
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124 requirement is strict: if the delays are too short or too long, the LCD doesn't |
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125 work. In target-utils all of these delays are implemented with CPU-cycle-count |
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126 delay loops that are calibrated at software design time; if the code runs out |
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127 of IRAM and the ARM7 core runs at 52 MHz, the delays will be exactly as |
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128 designed, otherwise they will be longer. In the case of pirexplore the strict |
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129 timing requirement is satisfied by loading and running the program via fc-iram |
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130 -h pirelli, resulting in the correct 52 MHz clock configuration; in all other |
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131 cases running at a frequency below 52 MHz or running out of flash (the |
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132 flash-boot-test special case) produces longer-than-needed delays. |