annotate loadtools/flashops.c @ 845:aec320fe2653

fc-tmsync: new madc command reads all 8 MADC channels
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 31 Jul 2021 22:23:05 +0000
parents 44cdfc4fed4c
children
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0
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1 /*
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2 * This module implements those flash operations which are dependent
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3 * on the AMD vs. Intel command set style.
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4 */
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5
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6 #include <sys/types.h>
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7 #include <stdio.h>
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8 #include <stdint.h>
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9 #include <stdlib.h>
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10 #include <time.h>
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11 #include "flash.h"
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12
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13 /* common stub functions */
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14
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15 static
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16 noop()
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17 {
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18 return(0);
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19 }
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20
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21 static
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22 amd_invalid()
0
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23 {
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24 fprintf(stderr,
506
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25 "This operation is not applicable to AMD-style flash\n");
0
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26 return(-1);
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27 }
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28
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29 /* AMD flash functions */
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30
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31 amd_reset_cmd(bi)
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32 struct flash_bank_info *bi;
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33 {
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34 if (do_w16(bi->base_addr + 0xAAA, 0xF0)) {
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35 fprintf(stderr,
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36 "unexpected response to w16 when resetting flash to read mode!\n");
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37 return(-1);
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38 }
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39 return(0);
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40 }
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41
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42 amd_sector_erase(bi, sp)
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43 struct flash_bank_info *bi;
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44 struct sector_info *sp;
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45 {
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46 int stat;
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47 uint16_t flstat;
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48 time_t start_time, curtime;
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49
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50 stat = do_w16(bi->base_addr + sp->start + 0xAAA, 0xAA);
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51 if (stat) {
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52 bad_w16: fprintf(stderr,
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53 "unexpected response to w16 in erase cmd sequence - aborting\n");
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54 return(-1);
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55 }
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56 stat = do_w16(bi->base_addr + sp->start + 0x554, 0x55);
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57 if (stat)
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58 goto bad_w16;
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59 stat = do_w16(bi->base_addr + sp->start + 0xAAA, 0x80);
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60 if (stat)
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61 goto bad_w16;
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62 stat = do_w16(bi->base_addr + sp->start + 0xAAA, 0xAA);
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63 if (stat)
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64 goto bad_w16;
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65 stat = do_w16(bi->base_addr + sp->start + 0x554, 0x55);
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66 if (stat)
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67 goto bad_w16;
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68 stat = do_w16(bi->base_addr + sp->start + 0xAAA, 0x30);
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69 if (stat)
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70 goto bad_w16;
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71 start_time = time(0);
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72 for (;;) {
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73 stat = do_r16(bi->base_addr + sp->start, &flstat);
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74 if (stat)
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75 return(stat); /* error msg already printed */
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76 if (flstat == 0xFFFF)
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77 return(0);
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78 curtime = time(0);
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79 if (curtime >= start_time + 20) {
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80 fprintf(stderr, "erase timeout, aborting\n");
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81 return(-1);
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82 }
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83 }
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84 }
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85
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86 struct flash_cmdset flash_cmdset_amd = {
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87 .cmdset_name = "AMD",
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88 .reset_cmd = amd_reset_cmd,
506
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89 .status_cmd = amd_invalid,
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90 .unlock_sector = amd_invalid,
0
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91 .erase_sector = amd_sector_erase,
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92 .prep_for_program = noop,
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93 .read_prot_reg = amd_invalid,
0
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94 .loadagent_setbase_cmd = "AMFB",
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95 .loadagent_program_cmd = "AMFW",
664
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96 .loadagent_binmode_cmd = "AMFWB",
0
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97 .needs_unlock = 0,
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98 };
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99
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100 /* Intel flash functions */
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101
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102 intel_reset_cmd(bi)
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103 struct flash_bank_info *bi;
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104 {
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105 if (do_w16(bi->base_addr, 0xFF)) {
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106 fprintf(stderr,
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107 "unexpected response to w16 when resetting flash to read mode!\n");
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108 return(-1);
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109 }
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Mychaela Falconia <falcon@freecalypso.org>
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110 return(0);
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Mychaela Falconia <falcon@freecalypso.org>
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111 }
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112
325
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Mychaela Falconia <falcon@freecalypso.org>
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113 intel_w30_reset_cmd(bi)
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114 struct flash_bank_info *bi;
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115 {
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116 uint32_t part;
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117
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118 for (part = 0; part < bi->geom->total_size; part += 0x80000) {
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parents: 0
diff changeset
119 if (do_w16(bi->base_addr + part, 0xFF)) {
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
120 fprintf(stderr,
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
121 "unexpected response to w16 when resetting flash to read mode!\n");
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
122 return(-1);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
123 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
124 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
125 return(0);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
126 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
127
0
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 intel_status_cmd(bi)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 struct flash_bank_info *bi;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 int stat;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 uint16_t sr;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 /* issue Read SR command */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 stat = do_w16(bi->base_addr, 0x70);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 if (stat) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 fprintf(stderr,
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 "unexpected response to w16 for Read SR command\n");
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 return(-1);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 stat = do_r16(bi->base_addr, &sr);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 return(stat); /* error msg already printed */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 sr &= 0xFF;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 printf("Status Register: %02X\n", sr);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 return(0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148
325
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
149 intel_w30_status_cmd(bi)
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
150 struct flash_bank_info *bi;
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
151 {
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
152 uint32_t part;
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
153 int stat;
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
154 uint16_t sr;
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
155
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
156 for (part = 0; part < bi->geom->total_size; part += 0x80000) {
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
157 /* issue Read SR command */
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
158 stat = do_w16(bi->base_addr + part, 0x70);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
159 if (stat) {
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
160 fprintf(stderr,
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
161 "unexpected response to w16 for Read SR command\n");
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
162 return(-1);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
163 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
164 stat = do_r16(bi->base_addr + part, &sr);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
165 if (stat)
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
166 return(stat); /* error msg already printed */
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
167 sr &= 0xFF;
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
168 printf("Status Register for partition %08lX: %02X\n",
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
169 (u_long) part, sr);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
170 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
171 return(0);
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
172 }
545e1718f5fb fc-loadtool: support for 28F640W30B flash chip with partition quirks
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
173
0
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 intel_sector_unlock(bi, sp)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 struct flash_bank_info *bi;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 struct sector_info *sp;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 int stat;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 stat = do_w16(bi->base_addr + sp->start, 0x60);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 if (stat) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 bad_w16: fprintf(stderr,
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 "unexpected response to w16 in block unlock cmd sequence - aborting\n");
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 return(-1);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 stat = do_w16(bi->base_addr + sp->start, 0xD0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 goto bad_w16;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 return(0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 intel_sector_erase(bi, sp)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 struct flash_bank_info *bi;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 struct sector_info *sp;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 int stat;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 uint16_t flstat;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 time_t start_time, curtime;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 stat = intel_sector_unlock(bi, sp);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 return(stat); /* error msg already printed */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 /* clear SR */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 stat = do_w16(bi->base_addr + sp->start, 0x50);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 if (stat) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 bad_w16: fprintf(stderr,
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 "unexpected response to w16 in erase cmd sequence - aborting\n");
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 return(-1);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 /* send the actual block erase command */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 stat = do_w16(bi->base_addr + sp->start, 0x20);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 goto bad_w16;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 stat = do_w16(bi->base_addr + sp->start, 0xD0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 goto bad_w16;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 /* wait for completion */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 start_time = time(0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 for (;;) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 stat = do_r16(bi->base_addr + sp->start, &flstat);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 if (stat)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 return(stat); /* error msg already printed */
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 if (flstat & 0x80)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 break;
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 curtime = time(0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 if (curtime >= start_time + 20) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 fprintf(stderr, "erase timeout, aborting\n");
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 return(-1);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 if (flstat & 0x20) {
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 fprintf(stderr, "block erase failed!\n");
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233 return(-1);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 } else
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 return(0);
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 }
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 intel_clear_sr(bi)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 struct flash_bank_info *bi;
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240 {
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241 printf("Clearing Intel flash SR\n");
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242 if (do_w16(bi->base_addr, 0x50)) {
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243 fprintf(stderr,
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244 "unexpected response to w16 for Clear SR command\n");
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245 return(-1);
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246 }
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247 return(0);
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248 }
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249
325
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250 intel_w30_clear_sr(bi)
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251 struct flash_bank_info *bi;
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252 {
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253 uint32_t part;
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254
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255 printf("Clearing Intel flash SR\n");
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256 for (part = 0; part < bi->geom->total_size; part += 0x80000) {
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257 if (do_w16(bi->base_addr + part, 0x50)) {
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258 fprintf(stderr,
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259 "unexpected response to w16 for Clear SR command\n");
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260 return(-1);
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261 }
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262 }
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263 return(0);
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264 }
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265
711
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266 intel_read_prot_reg(bi, data)
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267 struct flash_bank_info *bi;
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268 uint16_t *data;
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269 {
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270 int stat, i;
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271
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272 if (do_w16(bi->base_addr, 0x90)) {
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273 fprintf(stderr,
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274 "unexpected response to w16 for Read ID command\n");
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275 return(-1);
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276 }
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277 for (i = 0; i < 9; i++) {
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278 stat = do_r16(bi->base_addr + 0x100 + i * 2, data + i);
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279 if (stat)
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280 return(stat); /* error msg already printed */
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281 }
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282 return(0);
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283 }
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284
0
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285 struct flash_cmdset flash_cmdset_intel = {
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286 .cmdset_name = "Intel",
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287 .reset_cmd = intel_reset_cmd,
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288 .status_cmd = intel_status_cmd,
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289 .unlock_sector = intel_sector_unlock,
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290 .erase_sector = intel_sector_erase,
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291 .prep_for_program = intel_clear_sr,
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292 .read_prot_reg = intel_read_prot_reg,
0
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293 .loadagent_setbase_cmd = "INFB",
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294 .loadagent_program_cmd = "INFW",
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295 .loadagent_binmode_cmd = "INFWB",
0
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296 .needs_unlock = 1,
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297 };
325
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298
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299 struct flash_cmdset flash_cmdset_intel_w30 = {
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300 .cmdset_name = "Intel",
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301 .reset_cmd = intel_w30_reset_cmd,
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302 .status_cmd = intel_w30_status_cmd,
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303 .unlock_sector = intel_sector_unlock,
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304 .erase_sector = intel_sector_erase,
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305 .prep_for_program = intel_w30_clear_sr,
711
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306 .read_prot_reg = intel_read_prot_reg,
325
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307 .loadagent_setbase_cmd = "INFB",
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308 .loadagent_program_cmd = "INFW",
664
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309 .loadagent_binmode_cmd = "INFWB",
325
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310 .needs_unlock = 1,
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311 };