FreeCalypso > hg > freecalypso-tools

annotate loadtools/scripts/cs2-4ws-8mb.init @ 387:b61b81d3cece

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fcup-settime program written, compiles, produces expected AT+CCLK command
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 10 Mar 2018 00:46:03 +0000
parents e7502631a0f9
children
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e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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1 # This loadtool init script provides memory interface register setup
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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2 # for targets which fit the following criteria:
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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3 #
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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4 # 3 chip selects are used: nCS0, nCS1 and nCS2
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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5 # 4 wait states are to be used (register setting 00A4)
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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6 # 8 MiB memory banks are in use, such that ADD22 needs to be enabled
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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