FreeCalypso > hg > freecalypso-tools

annotate target-utils/include/timer.h @ 752:c79aaed75bd8

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
compile-fc-batt: allow possible third field in source lines Battery tables maintained in the fc-battery-conf repository will now have a third field added, defining thresholds for the battery bars icon, and there will be a new utility to compile them into the new /etc/batterytab2 file read by the FC Tourmaline version of our FCHG driver. For backward compatibility with the original Magnetite version of FCHG, compile-fc-batt remains the tool for compiling the original /etc/batterytab file format, and it needs to ignore the newly added third field in battery table sources.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 05 Nov 2020 20:37:55 +0000
parents 0f11da299b7d
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
77
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 /*
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 * Definitions for Calypso general-purpose timer registers
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 *
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 * This header is usable from both .c and .S source files.
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 */
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7 #ifndef _CALYPSO_TIMER_H
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 #define _CALYPSO_TIMER_H
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10 #define TIMER1_BASE_ADDR 0xFFFE3800
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11 #define TIMER2_BASE_ADDR 0xFFFE6800
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13 #ifdef __ASSEMBLER__
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15 /*
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16 * Assembly source with cpp
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 *
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
18 * The most convenient way to access registers like these from ARM
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
19 * assembly is to load the base address of the register block in some
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20 * ARM register, using only one ldr rN, =xxx instruction and only one
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21 * literal pool entry, and then access various registers in the block
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
22 * from the same base using the immediate offset addressing mode.
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
23 *
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
24 * Here we define the offsets for the usage scenario above.
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
25 */
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
26
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
27 #define CNTL_TIM 0x00
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
28 #define LOAD_TIM 0x02
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
29 #define READ_TIM 0x04
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
30
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
31 #else
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
32
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
33 /*
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
34 * C source
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
35 *
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
36 * For access from C, we define the layout of each timer register block
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
37 * as a struct, and then define a pleudo-global-var for easy "volatile"
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
38 * access to each of the 2 timers.
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
39 */
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
40
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
41 struct timer_regs {
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
42 unsigned char cntl;
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
43 unsigned char pad;
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
44 unsigned short load;
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
45 unsigned short read;
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
46 };
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
47
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
48 #define TIMER1_REGS (*(volatile struct timer_regs *) TIMER1_BASE_ADDR)
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
49 #define TIMER2_REGS (*(volatile struct timer_regs *) TIMER2_BASE_ADDR)
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
50
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
51 #endif
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
52
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
53 /* CNTL register bit definitions */
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
54 #define CNTL_START 0x01
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
55 #define CNTL_AUTO_RELOAD 0x02
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
56 #define CNTL_CLOCK_ENABLE 0x20
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
57
0f11da299b7d buzplayer: beginning of timer implementation
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
58 #endif /* include guard */