annotate target-utils/simtest/simregs.h @ 752:c79aaed75bd8

compile-fc-batt: allow possible third field in source lines Battery tables maintained in the fc-battery-conf repository will now have a third field added, defining thresholds for the battery bars icon, and there will be a new utility to compile them into the new /etc/batterytab2 file read by the FC Tourmaline version of our FCHG driver. For backward compatibility with the original Magnetite version of FCHG, compile-fc-batt remains the tool for compiling the original /etc/batterytab file format, and it needs to ignore the newly added third field in battery table sources.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 05 Nov 2020 20:37:55 +0000
parents d96ea6ae6aa5
children 6717f18780d8
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1 /* Calypso SIM registers definition */
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2
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3 #define SIM_BASE_ADDR 0xFFFE0000
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4
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5 struct sim_registers {
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6 u16 cmd;
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7 u16 stat;
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8 u16 conf1;
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9 u16 conf2;
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10 u16 it;
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11 u16 drx;
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12 u16 dtx;
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13 u16 maskit;
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14 u16 it_cd;
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15 };
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16
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17 #define SIMREGS (*(volatile struct sim_registers *) SIM_BASE_ADDR)
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18
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19 /*
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20 * Bit definitions
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21 */
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22 // control regidter
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23 #define SIM_CMD_CRST 0x0001
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24 #define SIM_CMD_SWRST 0x0002
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25 #define SIM_CMD_STOP 0x0004
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26 #define SIM_CMD_START 0x0008
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27 #define SIM_CMD_CLKEN 0x0010
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28
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29 // status register
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30 #define SIM_STAT_CD 0x0001 // card present
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31 #define SIM_STAT_TXPAR 0x0002 // transmit parity status
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32 #define SIM_STAT_FFULL 0x0004 // fifo full
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33 #define SIM_STAT_FEMPTY 0x0008 // fifo empty
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34
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35 // configuration register
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36 #define SIM_CONF1_CHKPAR 0x0001 // enable receipt check parity
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37 #define SIM_CONF1_CONV 0x0002 // coding convention
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38 #define SIM_CONF1_TXRX 0x0004 // SIO line direction
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39 #define SIM_CONF1_SCLKEN 0x0008 // enable SIM clock
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40 #define SIM_CONF1_RSVD 0x0010 // reserved
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41 #define SIM_CONF1_SCLKDIV 0x0020 // SIM clock frquency
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42 #define SIM_CONF1_SCLKLEV 0x0040 // SIM clock idle level
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43 #define SIM_CONF1_ETU 0x0080 // ETU period
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44 #define SIM_CONF1_BYPASS 0x0100 // bypass hardware timers
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45 #define SIM_CONF1_SVCCLEV 0x0200
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46 #define SIM_CONF1_SRSTLEV 0x0400
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47 #define SIM_CONF1_SIOLOW 0x8000 //force SIO to low level
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48
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49 // interrupt status register
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50 #define SIM_IT_NATR 0x0001 // No answer to reset
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51 #define SIM_IT_WT 0x0002
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52 #define SIM_IT_ITOV 0x0004
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53 #define SIM_IT_ITTX 0x0008 // Transmit
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54 #define SIM_IT_ITRX 0x0010 // Receipt
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55
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56 #define SIM_IT_CD 0x0001 // Card insertion/extraction
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57
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58 // interrupt mask register
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59 #define SIM_MASK_NATR 0x0001 // No answer to reset
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60 #define SIM_MASK_WT 0x0002
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61 #define SIM_MASK_OV 0x0004
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62 #define SIM_MASK_TX 0x0008 // Transmit
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63 #define SIM_MASK_RX 0x0010 // Receipt
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64 #define SIM_MASK_CD 0x0020 // Card insertion/extraction
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65
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66 // receveid byte register
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67 #define SIM_DRX_STATRXPAR 0x0100 // received byte parity status