FreeCalypso > hg > freecalypso-tools

annotate target-utils/simtest/setup.c @ 984:cec20c461b3a

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target-utils/pln-ppb-test: skeleton started
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 02 Dec 2023 23:20:07 +0000
parents 06ad5e30e8d0
children
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1 #include "types.h"
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2 #include "abbdefs.h"
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3 #include "simregs.h"
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4
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06ad5e30e8d0 target-utils: wait_ARM_cycles() changed to 4 cycles per loop
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5 #define WAIT_ONE_TDMA 60000
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6
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7 extern u16 abb_reg_read();
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8 extern void abb_reg_write();
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9
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10 u16 conf1_reg;
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11
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12 void
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13 cmd_setup(argbulk)
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14 char *argbulk;
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15 {
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16 u16 abb_sim_reg;
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17
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18 abb_sim_reg = abb_reg_read(VRPCSIM);
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19 if (!(abb_sim_reg & 2)) {
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20 printf("ERROR: VRSIM is not enabled\n");
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21 return;
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22 }
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23 if (!(abb_sim_reg & 4)) {
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24 printf("ERROR: VRSIM is not in proper regulation\n");
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25 return;
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26 }
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28 /* TI's SIM_ManualStart() code follows */
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29 SIMREGS.conf1 = conf1_reg = 0x8004;
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30 SIMREGS.cmd = SIM_CMD_CLKEN;
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32 SIMREGS.cmd = SIM_CMD_CLKEN | SIM_CMD_STOP;
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33 wait_ARM_cycles(WAIT_ONE_TDMA * 4);
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34
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35 SIMREGS.cmd = SIM_CMD_CLKEN | SIM_CMD_SWRST;
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36 wait_ARM_cycles(WAIT_ONE_TDMA);
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38 SIMREGS.conf2 = 0x0940;
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39
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40 //enter in manual mode to start the ATR sequence
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41 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_BYPASS;
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42 wait_ARM_cycles(WAIT_ONE_TDMA);
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44 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SVCCLEV;
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45 wait_ARM_cycles(WAIT_ONE_TDMA);
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46
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47 abb_sim_reg |= 8;
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48 abb_reg_write(VRPCSIM, abb_sim_reg);
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49 wait_ARM_cycles(WAIT_ONE_TDMA);
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51 SIMREGS.conf1 = conf1_reg &= ~SIM_CONF1_SIOLOW;
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52 wait_ARM_cycles(WAIT_ONE_TDMA);
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53
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54 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SCLKEN;
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55 SIMREGS.conf1 = conf1_reg &= ~SIM_CONF1_TXRX; //set to receive mode
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56 }