FreeCalypso > hg > freecalypso-tools

annotate toolchain/t-arm-elf @ 731:d89b72f2181b

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doc/TIFFS-IVA-usage: new decode facility documented
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 28 Aug 2020 05:56:13 +0000
parents e7502631a0f9
children
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1 # This is a modified version of the gcc/config/arm/t-arm-elf file
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2 # from gcc-4.5.4. It has been modified by Spacefalcon the Outlaw
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3 # for the FreeCalypso project; the changes are in the multilib
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4 # configuration:
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5 #
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6 # a) The fpu multilib has been commented out
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7 # b) The -mthumb-interwork multilib has been uncommented
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8
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9 # Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
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10 # 2008 Free Software Foundation, Inc.
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11 #
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12 # This file is part of GCC.
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13 #
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14 # GCC is free software; you can redistribute it and/or modify
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15 # it under the terms of the GNU General Public License as published by
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16 # the Free Software Foundation; either version 3, or (at your option)
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17 # any later version.
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18 #
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19 # GCC is distributed in the hope that it will be useful,
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20 # but WITHOUT ANY WARRANTY; without even the implied warranty of
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21 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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22 # GNU General Public License for more details.
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23 #
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24 # You should have received a copy of the GNU General Public License
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25 # along with GCC; see the file COPYING3. If not see
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26 # <http://www.gnu.org/licenses/>.
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27
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28 # For most CPUs we have an assembly soft-float implementations.
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29 # However this is not true for ARMv6M. Here we want to use the soft-fp C
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30 # implementation. The soft-fp code is only build for ARMv6M. This pulls
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31 # in the asm implementation for other CPUs.
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32 LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \
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33 _call_via_rX _interwork_call_via_rX \
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34 _lshrdi3 _ashrdi3 _ashldi3 \
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35 _arm_negdf2 _arm_addsubdf3 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \
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36 _arm_fixdfsi _arm_fixunsdfsi \
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37 _arm_truncdfsf2 _arm_negsf2 _arm_addsubsf3 _arm_muldivsf3 \
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38 _arm_cmpsf2 _arm_unordsf2 _arm_fixsfsi _arm_fixunssfsi \
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39 _arm_floatdidf _arm_floatdisf _arm_floatundidf _arm_floatundisf \
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40 _clzsi2 _clzdi2
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41
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42 MULTILIB_OPTIONS = marm/mthumb
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43 MULTILIB_DIRNAMES = arm thumb
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44 MULTILIB_EXCEPTIONS =
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45 MULTILIB_MATCHES =
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46
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47 #MULTILIB_OPTIONS += march=armv7
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48 #MULTILIB_DIRNAMES += thumb2
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49 #MULTILIB_EXCEPTIONS += march=armv7* marm/*march=armv7*
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50 #MULTILIB_MATCHES += march?armv7=march?armv7-a
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51 #MULTILIB_MATCHES += march?armv7=march?armv7-r
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52 #MULTILIB_MATCHES += march?armv7=march?armv7-m
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53 #MULTILIB_MATCHES += march?armv7=mcpu?cortex-a8
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54 #MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4
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55 #MULTILIB_MATCHES += march?armv7=mcpu?cortex-m3
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56
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57 # Not quite true. We can support hard-vfp calling in Thumb2, but how do we
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58 # express that here? Also, we really need architecture v5e or later
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59 # (mcrr etc).
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60 # MULTILIB_OPTIONS += mfloat-abi=hard
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61 # MULTILIB_DIRNAMES += fpu
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62 # MULTILIB_EXCEPTIONS += *mthumb/*mfloat-abi=hard*
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63
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64 # MULTILIB_OPTIONS += mcpu=ep9312
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65 # MULTILIB_DIRNAMES += ep9312
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66 # MULTILIB_EXCEPTIONS += *mthumb/*mcpu=ep9312*
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67 #
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68 # MULTILIB_OPTIONS += mlittle-endian/mbig-endian
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69 # MULTILIB_DIRNAMES += le be
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70 # MULTILIB_MATCHES += mbig-endian=mbe mlittle-endian=mle
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71 #
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72 # MULTILIB_OPTIONS += mhard-float/msoft-float
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73 # MULTILIB_DIRNAMES += fpu soft
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74 # MULTILIB_EXCEPTIONS += *mthumb/*mhard-float*
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75 #
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76 MULTILIB_OPTIONS += mno-thumb-interwork/mthumb-interwork
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77 MULTILIB_DIRNAMES += normal interwork
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78 #
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79 # MULTILIB_OPTIONS += fno-leading-underscore/fleading-underscore
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80 # MULTILIB_DIRNAMES += elf under
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81 #
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82 # MULTILIB_OPTIONS += mcpu=arm7
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83 # MULTILIB_DIRNAMES += nofmult
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84 # MULTILIB_EXCEPTIONS += *mthumb*/*mcpu=arm7*
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85 # # Note: the multilib_exceptions matches both -mthumb and
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86 # # -mthumb-interwork
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87 # #
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88 # # We have to match all the arm cpu variants which do not have the
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89 # # multiply instruction and treat them as if the user had specified
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90 # # -mcpu=arm7. Note that in the following the ? is interpreted as
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91 # # an = for the purposes of matching command line options.
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92 # # FIXME: There ought to be a better way to do this.
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93 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7d
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94 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7di
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95 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm70
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96 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm700
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97 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm700i
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98 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm710
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99 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm710c
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100 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7100
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101 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7500
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102 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7500fe
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103 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm6
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104 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm60
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105 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm600
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106 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm610
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107 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm620
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108
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109 EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
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110
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111 # If EXTRA_MULTILIB_PARTS is not defined above then define EXTRA_PARTS here
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112 # EXTRA_PARTS = crtbegin.o crtend.o crti.o crtn.o
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113
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114 LIBGCC = stmp-multilib
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115 INSTALL_LIBGCC = install-multilib
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116
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117 # Currently there is a bug somewhere in GCC's alias analysis
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118 # or scheduling code that is breaking _fpmul_parts in fp-bit.c.
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119 # Disabling function inlining is a workaround for this problem.
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120 TARGET_LIBGCC2_CFLAGS = -fno-inline
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121
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122 # Assemble startup files.
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123 $(T)crti.o: $(srcdir)/config/arm/crti.asm $(GCC_PASSES)
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124 $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
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125 -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/arm/crti.asm
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126
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127 $(T)crtn.o: $(srcdir)/config/arm/crtn.asm $(GCC_PASSES)
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128 $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
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129 -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/arm/crtn.asm
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130