FreeCalypso > hg > freecalypso-tools

annotate loadtools/scripts/dsample.config @ 401:da6df2c626cf

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
target-utils: wait for FIFO not full in serial_out() instead of FIFO empty
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 18 Mar 2018 07:22:26 +0000
parents 2b5ed962c2f9
children 49ee210fc4fb
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 # The following parameters go into the <p command sent to the boot ROM
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 # The values to be used have been gleaned from the 20020917 fw image
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 # CLKTCXO input is 13 MHz on the D-Sample, and with Calypso C05
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 # the max allowed PLL'ed clock is 78 MHz for the DSP and 39 MHz for the ARM.
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 # TI's firmware sets the PLL up to multiply by 6 (giving 78 MHz) with
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7 # divide by 2 for the ARM, but the boot ROM doesn't do the latter when
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 # the input clock is 13 MHz. Hence we'll program the PLL to multiply
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9 # by 3, putting everything at 39 MHz.
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11 pll-config 3/1
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12 rhea-cntl 0x00 # set by 20020917 fw, hence presumed correct
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14 # The remaining settings are carried out via loadagent commands
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15 init-script cs2-4ws-8mb.init
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 # 8 MiB flash, accessible at 0x03000000 without Compal-like problems,
326
2b5ed962c2f9 loadtools/scripts/dsample.config: use the new 28f640w30b chip type
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
18 # but the 28F640W30B flash chip has partition quirks, so we need to
2b5ed962c2f9 loadtools/scripts/dsample.config: use the new 28f640w30b chip type
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
19 # tell fc-loadtool about it explicitly instead of using CFI.
2b5ed962c2f9 loadtools/scripts/dsample.config: use the new 28f640w30b chip type
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
20 flash 28f640w30b 0x03000000
0
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
22 # Perform a Iota poweroff when we are done
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
23 exit-mode iota-off