FreeCalypso > hg > freecalypso-tools

annotate target-utils/libbase/abbdrv.c @ 0:e7502631a0f9

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initial import from freecalypso-sw rev 1033:5ab737ac3ad7
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 11 Jun 2016 00:13:35 +0000
parents
children 3d73d4d3527f
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0
e7502631a0f9 initial import from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
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1 /* Driver for Analog Baseband Circuit (TWL3025) */
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2 /* lifted from OsmocomBB and ported to FreeCalypso target-utils environment */
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3
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4 /* (C) 2010 by Harald Welte <laforge@gnumonks.org>
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5 *
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6 * All Rights Reserved
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7 *
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8 * This program is free software; you can redistribute it and/or modify
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9 * it under the terms of the GNU General Public License as published by
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10 * the Free Software Foundation; either version 2 of the License, or
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11 * (at your option) any later version.
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12 *
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13 * This program is distributed in the hope that it will be useful,
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14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 * GNU General Public License for more details.
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17 *
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18 * You should have received a copy of the GNU General Public License along
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19 * with this program; if not, write to the Free Software Foundation, Inc.,
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20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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21 *
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22 */
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23
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24 #include "types.h"
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25 #include "abbdefs.h"
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26
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27 /* TWL3025 */
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28 #define REG_PAGE(n) ((n) >> 7)
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29 #define REG_ADDR(n) ((n) & 0x1f)
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30
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31 #define TWL3025_DEV_IDX 0 /* On the SPI bus */
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32 #define TWL3025_TSP_DEV_IDX 0 /* On the TSP bus */
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33
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34 int abb_state_initdone, abb_state_page;
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35
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36 void
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37 abb_reg_write(reg, data)
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38 {
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39 u16 tx;
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40
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41 if (reg != PAGEREG && REG_PAGE(reg) != abb_state_page)
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42 abb_select_page(REG_PAGE(reg));
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43
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44 tx = ((data & 0x3ff) << 6) | (REG_ADDR(reg) << 1);
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45
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46 spi_xfer(TWL3025_DEV_IDX, 16, &tx, 0);
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47 }
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48
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49 u16
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50 abb_reg_read(reg)
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51 {
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52 u16 tx, rx;
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53
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54 if (REG_PAGE(reg) != abb_state_page)
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55 abb_select_page(REG_PAGE(reg));
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56
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57 tx = (REG_ADDR(reg) << 1) | 1;
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58
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59 /* A read cycle contains two SPI transfers */
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60 spi_xfer(TWL3025_DEV_IDX, 16, &tx, &rx);
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61 osmo_delay_ms(1);
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62 spi_xfer(TWL3025_DEV_IDX, 16, &tx, &rx);
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63
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64 rx >>= 6;
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65
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66 return rx;
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67 }
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68
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69 /* Switch the register page of the TWL3025 */
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70 abb_select_page(page)
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71 {
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72 if (page == 0)
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73 abb_reg_write(PAGEREG, 1 << 0);
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74 else
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75 abb_reg_write(PAGEREG, 1 << 1);
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76 abb_state_page = page;
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77 return(0);
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78 }
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79
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80 abb_init()
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81 {
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82 if (abb_state_initdone)
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83 return(0);
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84 spi_init();
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85 abb_select_page(0);
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86 /* CLK13M enable */
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87 abb_reg_write(TOGBR2, TOGBR2_ACTS);
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88 osmo_delay_ms(1);
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89 /* for whatever reason we need to do this twice */
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90 abb_reg_write(TOGBR2, TOGBR2_ACTS);
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91 osmo_delay_ms(1);
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92 abb_state_initdone = 1;
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93 return(1);
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94 }
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95
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96 void
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97 abb_power_off()
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98 {
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99 abb_init();
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100 serial_flush();
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101 abb_reg_write(VRPCDEV, 0x01);
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102 }