FreeCalypso > hg > freecalypso-tools
annotate doc/Calypso-chip-versions @ 1014:961efadd530a default tip
fc-shell TCH DL handler: add support for CSD modes
TCH DL capture mechanism in FC Tourmaline firmware has been extended
to support CSD modes in addition to speech - add the necessary support
on the host tools side.
It needs to be noted that this mechanism in its present state does NOT
provide the debug utility value that was sought: as we learned only
after the code was implemented, TI's DSP has a misfeature in that the
buffer we are reading (a_dd_0[]) is zeroed out when the IDS block
is enabled, i.e., we are reading all zeros and not the real DL bits
we were after. But since the code has already been written, we are
keeping it - perhaps we can do some tests with IDS disabled.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 26 Nov 2024 06:27:43 +0000 |
parents | a449ae0a1cec |
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rev | line source |
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1 There have been many different versions of the Calypso silicon made over the |
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2 years, including hardware differences, at least 3 ARM boot ROM versions and at |
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3 least 3 DSP ROM versions. New target utility calversion (to be run via fc-iram) |
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4 helps identify unknown Calypso chip versions: it reports the ARM boot ROM |
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5 version, the DSP ROM version and the values read from the few documented ID |
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6 registers. |
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7 |
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8 In order to be able to use our calversion utility to identify an unknown Calypso |
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9 variant, the Calypso device under examination needs to satisfy the following |
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10 two requirements: |
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11 |
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12 * The boot ROM needs to be enabled by nIBOOT pin strapping on the board, in |
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13 order to be able to get in with fc-iram; |
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14 |
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15 * The Calypso chip version to be identified needs to be Calypso C05 rev B or |
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16 later, containing ARM boot ROM version 0200 or 0300. This limitation exists |
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17 because our target-utils framework on which calversion is based depends on being |
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18 booted by a known Calypso boot ROM version in order to figure out which UART it |
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19 should use for communication. If anyone encounters a device with a Calypso C05 |
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20 rev A chip in it, you will need to somehow read out its boot ROM, send us that |
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21 boot ROM dump, and we will extend our UART detection logic in target-utils to |
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22 support that ancient boot ROM version which is currently unknown to us. |
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23 |
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24 If you have a Calypso boot ROM version which is not currently supported by our |
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25 target-utils, how can you read it out? The simplest way (assuming that nIBOOT |
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26 is strapped low on the board to enable the boot ROM) would be to edit |
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27 target-utils/libcommon/uartsel.c in your local copy, hard-code whichever UART |
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28 you are using in the uart_select_init() function, removing the boot ROM |
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29 version-dependent autodetection code, rebuild calversion and loadagent with |
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30 this hack, and use the modified loadagent with fc-loadtool to dump the ROM. |
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31 Alternatively, if the boot ROM is disabled with nIBOOT strapped high, you may |
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32 be able to read it out via JTAG, or perhaps via fc-memdump if the device |
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33 already runs some compatible firmware. |
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34 |
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35 Back to our calversion utility, if you have a Calypso device with a not-quite- |
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36 known chip version in it and you are able to get in with fc-loadtool, you can |
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37 run calversion on it as follows: |
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38 |
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39 fc-iram /dev/ttyXXX /opt/freecalypso/target-bin/calversion.srec |
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40 |
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41 You should get output that looks like this: |
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42 |
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43 Calypso version ID program running |
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44 Loaded via boot ROM v0300, UART 0 (MODEM) at baud rate #0 |
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45 CLKTCXO input autodetected to be 26 MHz |
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46 Device ID code: 0xB496 |
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47 Device version code: 0x0000 |
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48 ARM ID code: 0xFFF3 |
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49 cDSP ID code: 0x0128 |
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50 Releasing DSP core from reset |
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51 Waiting for DSP bootloader READY status |
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52 Loading NDB parameters |
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53 Loading PARAM area |
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54 Booting DSP main code |
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55 DSP reports version 0x3606 0x0000 |
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56 |
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57 You should be able to see which of the two supported boot ROM versions (0200 or |
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58 0300) your Calypso chip has, which UART was used to load the code, whether your |
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59 board uses a 13 MHz or a 26 MHz clock (this is a board-level property, not a |
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60 property of the Calypso chip), what values are reported in the device ID |
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61 registers, and the last bit which takes the most work to obtain - the DSP ROM |
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62 version. |
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63 |
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64 The boot ROM version and the CLKTCXO input frequency are also reported when you |
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65 run fc-loadtool, and the device ID registers can be trivially read with the r16 |
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66 command once you are in loadtool, but getting the DSP ROM version requires |
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67 putting the DSP through its messy boot process, which is why a special program |
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68 had to be written for the task. |