FreeCalypso > hg > freecalypso-tools

annotate target-utils/libbase/abbdrv.c @ 1011:6d9b10633f10 default tip

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etmsync Pirelli IMEI retrieval: fix poor use of printf() Bug reported by Vadim Yanitskiy <fixeria@osmocom.org>: the construct where a static-allocated string was passed to printf() without any format arguments causes newer compilers to report a security problem. Given that formatted output is not needed here, just fixed string output, change printf() to fputs(), and direct the error message to stderr while at it.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 23 May 2024 17:29:57 +0000
parents a04a145098f1
children
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rev   line source
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1 /* Driver for Analog Baseband Circuit (TWL3025) */
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2 /* lifted from OsmocomBB and ported to FreeCalypso target-utils environment */
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3
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4 /* (C) 2010 by Harald Welte <laforge@gnumonks.org>
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5 *
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6 * All Rights Reserved
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7 *
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8 * This program is free software; you can redistribute it and/or modify
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9 * it under the terms of the GNU General Public License as published by
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10 * the Free Software Foundation; either version 2 of the License, or
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11 * (at your option) any later version.
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12 *
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13 * This program is distributed in the hope that it will be useful,
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14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 * GNU General Public License for more details.
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17 *
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18 * You should have received a copy of the GNU General Public License along
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19 * with this program; if not, write to the Free Software Foundation, Inc.,
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20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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21 *
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22 */
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23
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24 #include "types.h"
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25 #include "abbdefs.h"
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26
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27 /* TWL3025, modified for page 2 support */
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28 #define REG_PAGE(n) ((n) >> 6)
0
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29 #define REG_ADDR(n) ((n) & 0x1f)
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30
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31 #define TWL3025_DEV_IDX 0 /* On the SPI bus */
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32 #define TWL3025_TSP_DEV_IDX 0 /* On the TSP bus */
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33
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34 int abb_state_initdone, abb_state_page;
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35
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36 void
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37 abb_reg_write(reg, data)
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38 {
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39 u16 tx;
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40
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41 if (reg != PAGEREG && REG_PAGE(reg) != abb_state_page)
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42 abb_select_page(REG_PAGE(reg));
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43
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44 tx = ((data & 0x3ff) << 6) | (REG_ADDR(reg) << 1);
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45
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46 spi_xfer(TWL3025_DEV_IDX, 16, &tx, 0);
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47 }
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48
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49 u16
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50 abb_reg_read(reg)
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51 {
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52 u16 tx, rx;
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53
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54 if (REG_PAGE(reg) != abb_state_page)
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55 abb_select_page(REG_PAGE(reg));
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56
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57 tx = (REG_ADDR(reg) << 1) | 1;
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58
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59 /* A read cycle contains two SPI transfers */
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60 spi_xfer(TWL3025_DEV_IDX, 16, &tx, &rx);
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61 /* delay of seven 13MHz cycles */
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62 wait_ARM_cycles(7);
0
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63 spi_xfer(TWL3025_DEV_IDX, 16, &tx, &rx);
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64
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65 rx >>= 6;
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66
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67 return rx;
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68 }
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69
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70 /* Switch the register page of the TWL3025 */
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71 abb_select_page(page)
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72 {
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73 switch (page) {
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74 case 0:
0
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75 abb_reg_write(PAGEREG, 1 << 0);
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76 break;
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77 case 1:
0
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78 abb_reg_write(PAGEREG, 1 << 1);
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79 break;
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80 case 2:
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81 /* not documented in datasheet, learned from TCS211 code */
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82 abb_reg_write(PAGEREG, 1 << 4);
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83 break;
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84 }
0
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85 abb_state_page = page;
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86 return(0);
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87 }
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88
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89 abb_init()
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90 {
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91 if (abb_state_initdone)
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92 return(0);
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93 spi_init();
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94 abb_select_page(0);
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95 /* CLK13M enable */
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96 abb_reg_write(TOGBR2, TOGBR2_ACTS);
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97 /* ABB_Wait_IBIC_Access() delay of 210 us */
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98 wait_ARM_cycles(210 * 13);
0
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99 /* for whatever reason we need to do this twice */
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100 abb_reg_write(TOGBR2, TOGBR2_ACTS);
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101 /* ABB_Wait_IBIC_Access() delay of 210 us */
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102 wait_ARM_cycles(210 * 13);
0
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103 abb_state_initdone = 1;
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104 return(1);
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105 }
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106
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107 void
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108 abb_unlock_page2()
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109 {
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110 abb_reg_write(TAPCTRL, 0x01);
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111 abb_reg_write(TAPREG, 0x1B);
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112 }
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113
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114 void
0
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115 abb_power_off()
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116 {
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117 abb_init();
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118 /*
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119 * If we booted via nTESTRESET, we need to clean up some state
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120 * in a secret undocumented Iota register before we do the DEVOFF,
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121 * otherwise subsequent switch-on via regular PWON button
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122 * won't work correctly.
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123 */
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124 abb_unlock_page2();
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125 abb_reg_write(VRPCAUX, 0x07);
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126 serial_flush();
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127 abb_reg_write(VRPCDEV, 0x01); /* DEVOFF */
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128 /*
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129 * TWL3025 datasheet seems to indicate that the time for the DEVOFF
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130 * command to take effect is 5 cycles of the 32.768 kHz clock.
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131 * We'll do an ARM-timed delay of 10 ms before returning from
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132 * this function.
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133 */
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134 wait_ARM_cycles(13000 * 10);
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135 }