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comparison target-utils/lunadrv/formike.c @ 832:21e0e6492cda

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lunadrv: add init-kwh for KWH020ST23-F01 LCD
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 22 Jun 2021 02:24:38 +0000
parents target-utils/lunadrv/haoran.c@db9a8e88e63f
children
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831:2f401860e9ad 832:21e0e6492cda
1 #include "types.h"
2 #include "luna.h"
3
4 /*
5 * ILI9225G register init for Formike KWH020ST23-F01 LCD. This initialization
6 * is almost exactly the same as for our previous HaoRan HT020K1QC36S LCD,
7 * except for a different VCOMH setting in register 0x14. Our Formike sales
8 * engineer confirmed that the new register setting is required for the new LCD.
9 */
10
11 init_formike()
12 {
13 /* reset pulse */
14 CNTL_RST_REG |= EXT_RESET;
15 wait_ARM_cycles(DELAY_1MS * 10);
16 CNTL_RST_REG &= ~EXT_RESET;
17 wait_ARM_cycles(DELAY_1MS * 50);
18 /* start register init */
19 LCD_REG_WR(0x0001, 0x011c); // set SS and NL bit
20 LCD_REG_WR(0x0002, 0x0100); // set 1 line inversion
21 LCD_REG_WR(0x0003, 0x1030); // set GRAM write direction and BGR=1.
22 LCD_REG_WR(0x0008, 0x0808); // set BP and FP
23 LCD_REG_WR(0x000F, 0x0901); // Set frame rate
24 wait_ARM_cycles(DELAY_1MS * 10);
25 LCD_REG_WR(0x0010, 0x0000); // Set SAP,DSTB,STB
26 LCD_REG_WR(0x0011, 0x1B41); // Set APON,PON,AON,VCI1EN,VC
27 wait_ARM_cycles(DELAY_1MS * 50);
28 LCD_REG_WR(0x0012, 0x200E); // Internal reference voltage= Vci;
29 LCD_REG_WR(0x0013, 0x0052); // Set GVDD
30 LCD_REG_WR(0x0014, 0x535C); // new VCOMH setting for KWH020ST23-F01
31 //------------- Set GRAM area ------------------//
32 LCD_REG_WR(0x0030, 0x0000);
33 LCD_REG_WR(0x0031, 0x00DB);
34 LCD_REG_WR(0x0032, 0x0000);
35 LCD_REG_WR(0x0033, 0x0000);
36 LCD_REG_WR(0x0034, 0x00DB);
37 LCD_REG_WR(0x0035, 0x0000);
38 LCD_REG_WR(0x0036, 0x00AF);
39 LCD_REG_WR(0x0037, 0x0000);
40 LCD_REG_WR(0x0038, 0x00DB);
41 LCD_REG_WR(0x0039, 0x0000);
42 // ----------- Adjust the Gamma Curve ----------//
43 LCD_REG_WR(0x0050, 0x0000);
44 LCD_REG_WR(0x0051, 0x0705);
45 LCD_REG_WR(0x0052, 0x0C0A);
46 LCD_REG_WR(0x0053, 0x0401);
47 LCD_REG_WR(0x0054, 0x040C);
48 LCD_REG_WR(0x0055, 0x0608);
49 LCD_REG_WR(0x0056, 0x0000);
50 LCD_REG_WR(0x0057, 0x0104);
51 LCD_REG_WR(0x0058, 0x0E06);
52 LCD_REG_WR(0x0059, 0x060E);
53 wait_ARM_cycles(DELAY_1MS * 50);
54 LCD_REG_WR(0x0007, 0x1017);
55 return(0);
56 }