FreeCalypso > hg > freecalypso-tools
comparison rvinterf/include/l1tm.h @ 116:3eb75280b38b
rvinterf/include/l1tm.h: definitions from l1tm_msgty.h in the firmware
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sat, 18 Feb 2017 06:54:06 +0000 |
parents | |
children | 4070847293a9 |
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115:c41511b79b1d | 116:3eb75280b38b |
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1 /* | |
2 * This header file contains various definitions for talking to the | |
3 * L1TM firmware component. | |
4 */ | |
5 | |
6 enum RF_PARAM | |
7 { | |
8 BCCH_ARFCN = 1, | |
9 TCH_ARFCN = 2, | |
10 MON_ARFCN = 3, | |
11 PDTCH_ARFCN = 4, | |
12 STD_BAND_FLAG = 7, | |
13 AFC_ENA_FLAG = 8, | |
14 AFC_DAC_VALUE = 9, | |
15 INITIAL_AFC_DAC = 10, | |
16 MULTISLOT_CLASS = 20 | |
17 }; | |
18 | |
19 enum RF_TABLE | |
20 { | |
21 RX_AGC_TABLE = 8, | |
22 AFC_PARAMS = 9, | |
23 RX_AGC_GLOBAL_PARAMS = 12, | |
24 RX_IL_2_AGC_MAX = 13, | |
25 RX_IL_2_AGC_PWR = 14, | |
26 RX_IL_2_AGC_AV = 15, | |
27 TX_LEVELS = 16, // 16=GSM900, 32=DCS1800, 48=PCS1900 | |
28 TX_CAL_CHAN = 17, // 17=GSM900, 33=DCS1800, 49=PCS1900 | |
29 TX_CAL_TEMP = 20, // 20=GSM900, 36=DCS1800, 52=PCS1900 | |
30 TX_CAL_EXTREME = 19, // 19=GSM900, 35=DCS1800, 51=PCS1900 | |
31 RX_CAL_CHAN = 25, // 25=GSM900, 41=DCS1800, 57=PCS1900 | |
32 RX_CAL_TEMP = 26, // 26=GSM900, 42=DCS1800, 58=PCS1900 | |
33 RX_CAL_LEVEL = 27, // 27=GSM900, 43=DCS1800, 59=PCS1900 | |
34 RX_AGC_PARAMS = 31, // 31=GSM900, 47=DCS1800, 63=PCS1900 | |
35 RX_AGC_PARAMS_PCS = 63, | |
36 TX_DATA_BUFFER = 80, | |
37 RLC_TX_BUFFER_CS1 = 81, | |
38 RLC_TX_BUFFER_CS2 = 82, | |
39 RLC_TX_BUFFER_CS3 = 83, | |
40 RLC_TX_BUFFER_CS4 = 84 | |
41 }; | |
42 | |
43 enum RX_PARAM | |
44 { | |
45 RX_AGC_GAIN = 1, | |
46 RX_TIMESLOT = 2, | |
47 RX_AGC_ENA_FLAG = 8, | |
48 RX_PM_ENABLE = 9, | |
49 RX_FRONT_DELAY = 10, | |
50 RX_FLAGS_CAL = 14, | |
51 RX_FLAGS_PLATFORM = 15, | |
52 RX_FLAGS_IQ_SWAP = 17, | |
53 RX_FLAGS_ALL = 18, | |
54 RX_GPRS_SLOTS = 28, | |
55 RX_GPRS_CODING = 29 | |
56 }; | |
57 | |
58 enum TX_PARAM | |
59 { | |
60 TX_PWR_LEVEL = 1, | |
61 TX_APC_DAC = 4, | |
62 TX_RAMP_TEMPLATE = 5, | |
63 TX_CHAN_CAL_TABLE = 6, | |
64 TX_RESERVED = 7, | |
65 TX_BURST_TYPE = 8, | |
66 TX_BURST_DATA = 9, | |
67 TX_TIMING_ADVANCE = 10, | |
68 TX_TRAINING_SEQ = 11, | |
69 TX_PWR_SKIP = 13, | |
70 TX_FLAGS_CAL = 14, | |
71 TX_FLAGS_PLATFORM = 15, | |
72 TX_FLAGS_IQ_SWAP = 17, | |
73 TX_FLAGS_ALL = 18, | |
74 TX_GPRS_POWER0 = 20, | |
75 TX_GPRS_POWER1 = 21, | |
76 TX_GPRS_POWER2 = 22, | |
77 TX_GPRS_POWER3 = 23, | |
78 TX_GPRS_POWER4 = 24, | |
79 TX_GPRS_POWER5 = 25, | |
80 TX_GPRS_POWER6 = 26, | |
81 TX_GPRS_POWER7 = 27, | |
82 TX_GPRS_SLOTS = 28, | |
83 TX_GPRS_CODING = 29 | |
84 }; | |
85 | |
86 enum MISC_PARAM | |
87 { | |
88 GPIOSTATE0 = 8, | |
89 GPIODIR0 = 9, | |
90 GPIOSTATE1 = 10, | |
91 GPIODIR1 = 11, | |
92 GPIOSTATE0P = 12, | |
93 GPIODIR0P = 13, | |
94 GPIOSTATE1P = 14, | |
95 GPIODIR1P = 15, | |
96 ADC_INTERVAL = 18, | |
97 ADC_ENA_FLAG = 19, | |
98 CONVERTED_ADC0 = 20, | |
99 CONVERTED_ADC1 = 21, | |
100 CONVERTED_ADC2 = 22, | |
101 CONVERTED_ADC3 = 23, | |
102 CONVERTED_ADC4 = 24, | |
103 CONVERTED_ADC5 = 25, | |
104 CONVERTED_ADC6 = 26, | |
105 CONVERTED_ADC7 = 27, | |
106 CONVERTED_ADC8 = 28, | |
107 RAW_ADC0 = 30, | |
108 RAW_ADC1 = 31, | |
109 RAW_ADC2 = 32, | |
110 RAW_ADC3 = 33, | |
111 RAW_ADC4 = 34, | |
112 RAW_ADC5 = 35, | |
113 RAW_ADC6 = 36, | |
114 RAW_ADC7 = 37, | |
115 RAW_ADC8 = 38, | |
116 ADC0_COEFF_A = 50, | |
117 ADC1_COEFF_A = 51, | |
118 ADC2_COEFF_A = 52, | |
119 ADC3_COEFF_A = 53, | |
120 ADC4_COEFF_A = 54, | |
121 ADC5_COEFF_A = 55, | |
122 ADC6_COEFF_A = 56, | |
123 ADC7_COEFF_A = 57, | |
124 ADC8_COEFF_A = 58, | |
125 ADC0_COEFF_B = 60, | |
126 ADC1_COEFF_B = 61, | |
127 ADC2_COEFF_B = 62, | |
128 ADC3_COEFF_B = 63, | |
129 ADC4_COEFF_B = 64, | |
130 ADC5_COEFF_B = 65, | |
131 ADC6_COEFF_B = 66, | |
132 ADC7_COEFF_B = 67, | |
133 ADC8_COEFF_B = 68, | |
134 SLEEP_MODE = 80, | |
135 CURRENT_TM_MODE = 127 | |
136 }; | |
137 | |
138 enum STATS_CONFIG | |
139 { | |
140 LOOPS = 16, | |
141 AUTO_RESULT_LOOPS = 17, | |
142 AUTO_RESET_LOOPS = 18, | |
143 STAT_GPRS_SLOTS = 20, | |
144 STAT_TYPE = 24, | |
145 STAT_BITMASK = 25 | |
146 }; | |
147 | |
148 enum STATS_READ | |
149 { | |
150 ACCUMULATED_RX_STATS = 1, | |
151 MOST_RECENT_RX_STATS = 2 | |
152 }; | |
153 | |
154 enum BITMASK | |
155 { | |
156 RSSI = 0x0001, | |
157 DSP_PM = 0x0002, | |
158 ANGLE_MEAN = 0x0004, | |
159 ANGLE_VAR = 0x0008, | |
160 SNR_MEAN = 0x0010, | |
161 SNR_VAR = 0x0020, | |
162 TOA_MEAN = 0x0040, | |
163 TOA_VAR = 0x0080, | |
164 RESERVED1 = 0x0100, | |
165 RESERVED2 = 0x0200, | |
166 ANGLE_MIN = 0x0400, | |
167 ANGLE_MAX = 0x0800, | |
168 FRAME_NUMBER = 0x1000, | |
169 RUNS = 0x2000, | |
170 SUCCESSES = 0x4000, | |
171 BSIC = 0x8000 | |
172 }; | |
173 | |
174 enum RF_ENABLE_E | |
175 { | |
176 STOP_ALL = 0, | |
177 RX_TCH = 1, | |
178 TX_TCH = 2, | |
179 RX_TX_TCH = 3, | |
180 RX_TX_PDTCH = 4, | |
181 RX_TCH_CONT = 8, | |
182 TX_TCH_CONT = 9, | |
183 BCCH_LOOP = 10, | |
184 SB_LOOP = 11, | |
185 FB1_LOOP = 12, | |
186 FB0_LOOP = 13, | |
187 SINGLE_PM = 15, | |
188 RX_TX_PDTCH_MON = 16, | |
189 RX_TX_MON_TCH = 19, | |
190 RX_TX_MON = 27 | |
191 }; |